[U-Boot-Users] AT91RM9200 Errata (Was: CSB637 support - big bug..)
Steven Scholz
steven.scholz at imc-berlin.de
Wed Aug 24 10:38:32 CEST 2005
Martin,
> A clock rate > 180 MHz could be problematic. According errata 42
> (AC Characteristics: PLL Frequency Limitation), in AT91RM9200 errata
> sheet (doc6015) the PLL is limited to 180 MHz. We already had problems
> with this bug (with about 10%-15% of the CPUs). After configuring the
> PLL for 179 MHz no errors occour any mor (before we used 207 MHz).
Which errors and problems did you encounter?
--
Steven
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