[U-Boot-Users] IBM/AMCC 440EP ethernet question

Miles Gazic mgazic at earthlink.net
Fri Feb 18 14:31:23 CET 2005


Apart from the typo I posted about in my previous message, there is one bit field that looks different between the 405GP header file and what the 440EP has.  There is a #define for EMAC_ISR_SYE in the 405 header file, and it's at the same place that something called ALE (alignment error) is at in the 440EP user manual I have.  That bit is set high in the 405 code when the speed is supposed to be 100Mbps.  I don't know what the reprecussions of setting it high are if it really is ALE and not SYE.  But it can't be too important if it's worked like that so far for you.

Do you happen to know what PHY you are using?  Our Broadcom AC101L can do both RMII and MII, the hardware guy thinks all he might have to do is pop in a 50MHz crystal instead of the 25MHz one we have now.  I think it might be worthwhile for me to try that, at least I'll be travelling down the road more well travelled.


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