[U-Boot-Users] Enabling caches on MPC8270

Martin Klonfar zrus at volny.cz
Mon Feb 28 18:32:38 CET 2005

I am developing a standalone aplication for MPC8270 (PM827 board),
but I have the U-Boot 1.0.1 for, say, "inspiration" as well. I can
not force the CPU to use caches. I use the standard (i.e.
documented) technique - setting the ICE/DCE and ICFI/DCFI bits in
HID0 and then clearing the ICFI/DCFI bits. I have also tried to set
the IFEM and ABE bits (although I don't see any reason for it in
single-processor system) - inspiration by U-Boot :-) - with no
result. CPU either gets 'crazy', decrementing the PC instead of
incrementing it, or it just doesn't work correctly (for example CRC
verification, which normally passes through, suddenly doesn't). No
address translation mechanism is activated. When I let the U-Boot
to initialize the CPU, the instruction cache works. Then I can
reset the CPU, use my initialization code, and it works as well. Is
there some other control of the caches in addition to HID0 and HID2?
 Enabling the data cache makes the CPU 'crazy' in either case (i.e.
even after initialization by the U-Boot). Thanks for any hint.

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