[U-Boot-Users] Enabling caches on MPC8270
Jerry Van Baren
gerald.vanbaren at smiths-aerospace.com
Mon Feb 28 19:17:26 CET 2005
Martin Klonfar wrote:
> I am developing a standalone aplication for MPC8270 (PM827 board),
> but I have the U-Boot 1.0.1 for, say, "inspiration" as well. I can
> not force the CPU to use caches. I use the standard (i.e.
> documented) technique - setting the ICE/DCE and ICFI/DCFI bits in
> HID0 and then clearing the ICFI/DCFI bits. I have also tried to set
> the IFEM and ABE bits (although I don't see any reason for it in
> single-processor system) - inspiration by U-Boot :-) - with no
> result. CPU either gets 'crazy', decrementing the PC instead of
> incrementing it, or it just doesn't work correctly (for example CRC
> verification, which normally passes through, suddenly doesn't). No
> address translation mechanism is activated. When I let the U-Boot
> to initialize the CPU, the instruction cache works. Then I can
> reset the CPU, use my initialization code, and it works as well. Is
> there some other control of the caches in addition to HID0 and HID2?
> Enabling the data cache makes the CPU 'crazy' in either case (i.e.
> even after initialization by the U-Boot). Thanks for any hint.
I don't know if this is your problem, but your disavowing of using the
memory management makes me suspicious that it is...
You need to set up the memory management to mark your I/O memory areas
non-cached. When you turn on caches, they apply to the _whole_ memory
space unless otherwise marked "non cached." For simple programs like
u-boot and, most likely, yours, the BATs (especially DBAT) is
sufficient. Linux uses the full blown page tables which gets a little
more complex ;-).
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