[U-Boot-Users] MIPS build environment

[Eugene Surovegin]

On Fri, Jan 28, 2005 at 06:13:23PM -0800, Dan Malek wrote:
> Unless I'm doing something wrong, I also have
> to use binutils with the 'allow_branch_to_undefined'
> patch.

Hmm, why do you need this? 

The only problematic place IIRC is in start.S which is trivially 
fixable without any additional toolchain patches or hacks like 
"mips_allow_branch_to_undefined". Just move initialization of GOT 
pointer right after CONFIG0 and use la/jalr instead of bal when 
calling memsetup, mips_cache_reset etc. This is what I did for MVL 3.1 
based MIPS toolchain.

As a side note, "Setup temporary stack" is completely bogus and isn't 
needed, at least for 4kc which has a write-through dcache (4kc is the 
only MIPS arch currently supported, btw).

--
Eugene
-------------- next part --------------
--- start.S	2004-02-06 17:27:17.000000000 -0800
+++ start.S~jalr	2005-01-29 16:13:18.000000000 -0800
@@ -234,21 +234,35 @@
 	li	t0, CONF_CM_UNCACHED
 	mtc0	t0, CP0_CONFIG
 
+	/* Initialize GOT pointer.
+	 */
+	bal	1f
+	nop
+	.word	_GLOBAL_OFFSET_TABLE_ - 1f + 4
+1:
+	move	gp, ra
+	lw	t1, 0(ra)
+	add	gp, t1
+
+
 #ifdef CONFIG_INCA_IP
 	/* Disable INCA-IP Watchdog.
 	 */
-	bal	disable_incaip_wdt
+	la	t9, disable_incaip_wdt
+	jalr	t9
 	nop
 #endif
 
 	/* Initialize any external memory.
 	 */
-	bal	memsetup
+	la	t9, memsetup
+	jalr	t9
 	nop
 
 	/* Initialize caches...
 	 */
-	bal	mips_cache_reset
+	la	t9, mips_cache_reset
+	jalr	t9
 	nop
 
 	/* ... and enable them.
@@ -260,21 +274,13 @@
 	/* Set up temporary stack.
 	 */
 	li	a0, CFG_INIT_SP_OFFSET
-	bal	mips_cache_lock
+	la	t9, mips_cache_lock
+	jalr	t9
 	nop
 
 	li	t0, CFG_SDRAM_BASE + CFG_INIT_SP_OFFSET
 	la	sp, 0(t0)
 
-	/* Initialize GOT pointer.
-	 */
-	bal	1f
-	nop
-	.word	_GLOBAL_OFFSET_TABLE_ - 1f + 4
-1:
-	move	gp, ra
-	lw	t1, 0(ra)
-	add	gp, t1
 	la	t9, board_init_f
 	j	t9
 	nop