AW: [U-Boot-Users] [PATCH 4/4] add csb637 (at91rm9200) support

[Martin Krause]

Hi Anders,

Anders Larsen wrote on Dienstag, 3. Mai 2005 11:36:
> "Martin Krause" <Martin.Krause at tqs.de> wrote:
> > That's very similar to your results, but not exact the same.
> > Perhaps because you are using a 2.6 kernel. What CPU clock frequency
> > do you use? We use 179 MHz.
> 
> Hi Martin,
> my csb637 runs at 184MHz, and yes, my RSA encryption benchmark runs

OK, that explains your slightly better nbench results.

A clock rate > 180 MHz could be problematic. According errata 42 
(AC Characteristics: PLL Frequency Limitation), in AT91RM9200 errata 
sheet (doc6015) the PLL is limited to 180 MHz. We already had problems 
with this bug (with about 10%-15% of the CPUs). After configuring the
PLL for 179 MHz no errors occour any mor (before we used 207 MHz).

> > Here are my nbench results for synchronous clock mode
> > (nbench 2.2.1 on cmc-pu2 board):
> ...
> > 
> > And this are the results for fast bus mode:
> 
> Err, didn't you say the results were the same?

Yes. In my first email I referred to a nbench result taken with 
U-Boot 1.1.2 (some weeks ago). Then I did a new measurement with
the actual U-Boot (1.1.3) and get the results mentioned in my
second email - whith only one third of the old performance :-(,
because the setting of the clock mode has changed in U-boot.

> Synchronous mode is about three times faster than FastBus mode
> on your HW...

Yes, I think this is because of a CPU clock to master clock ratio
of 3:1.

> AFAICT synchronous clock mode performs marginally better than
> asynchronous mode, but since asynchronous mode has less restrictions
> than synchronous mode, asynchronous is arguably the better (= more
> general) solution. I'll submit an alternative patch.

OK, I would also prefere the asynchronous mode, because that was
the mode used by U-Boot 1.1.2 and we've done already a lot tests
with our hardware with this mode.

Regards,
Martin