[U-Boot-Users] [PATCH 4/4] add csb637 (at91rm9200) support

[Anders Larsen]

"Martin Krause" <Martin.Krause at tqs.de> wrote:
>A clock rate > 180 MHz could be problematic. According errata 42 
>(AC Characteristics: PLL Frequency Limitation), in AT91RM9200 errata 
>sheet (doc6015) the PLL is limited to 180 MHz. We already had problems 
>with this bug (with about 10%-15% of the CPUs). After configuring the
>PLL for 179 MHz no errors occour any mor (before we used 207 MHz).

Hi Martin,
it was Cogent who decided to let the csb637 run at 184MHz, not me.
Thanks for the warning anyway - I'll take care that our upcoming
custom AT91RM9200 board stays below 180MHz.

>> Synchronous mode is about three times faster than FastBus mode
>> on your HW...
>
>Yes, I think this is because of a CPU clock to master clock ratio
>of 3:1.

Sounds plausible indeed...
>
>OK, I would also prefere the asynchronous mode, because that was
>the mode used by U-Boot 1.1.2 and we've done already a lot tests
>with our hardware with this mode.

OK, I've already submitted a patch accordingly.

Cheers
 Anders