[U-Boot-Users] Re: Low-boot configuration for MPC8272ADS

Dmytro Bablinyuk dmytro.bablinyuk at rftechnology.com.au
Thu Nov 3 00:43:16 CET 2005

> Is this with an erased flash or with a flash with a HRCW programmed?
This is with a flash with HRCW programmed. U-boot starts fine.
But BDI on 'load'
Loading u-boot.bin , please wait ....
# PPC: timeout while waiting for freeze
*** TARGET: reset detected, restarting target

Here is the HRCW (from flash). 0x74 => ISB100 => IMMR=0xF000_0000

8272>md 0
00000000 : ff0e0e0e 0e0e0e0e 74747474 74747474  ........tttttttt
00000010 : b2b2b2b2 b2b2b2b2 0a0a0a0a 0a0a0a0a  ................

And BDI config (we use CLKIN 66MHz, but it is the same effect with CLKIN 

; bdiGDB configuration file for MPC8272ADS board
; ----------------------------------------------

; init core register
;WREG    MSR             0x00001002      ;MSR  : ME,RI
WM32	0xF0010004	0xFFFFFFC3	;SYPCR: disable watchdog
WM32	0xF00101A8	0x04700000	;IMMR : internal space @ 0x04700000
WM32	0x04710024	0x100C0000	;BCR  : Single PQ2, ..
WM32	0x04710c94	0x00000001	;RMR  : checkstop reset enable
; init memory controller
WM32	0x04710104	0xFF800876	;OR0: Flash 8MB, CS early negate, 11 w.s., 
Timing relax
WM32	0x04710100	0xFF801801	;BR0: Flash @0xFF800000, 32bit, no parity
WM32	0x0471010C	0xFFFF8010	;OR1: BCSR 32KB, all types access, 1 w.s.
WM32	0x04710108	0x04501801	;BR1: BCSR @0x04500000, 32bit, no parity
WM32	0x04710124	0xFFFF8866	;OR4: EEPROM 32KB, all types access, 6 w.s.
WM32	0x04710120	0xC2000801	;BR4: EEPROM @0xC2000000, 8bit, no parity
; init SDRAM Init (PPC bus)
WM16	0x04710184	0x2800	        ;MPTPR: Divide Bus clock by 41
WM8	0x0471019C	0x13	        ;PSRT : Divide MPTPR output by 20
WM32	0x04710114	0xfe002ec0	;OR2  : 32MB, 2 banks, row start at A9, 11 rows
WM32	0x04710110	0x00000041	;BR2  : SDRAM @0x00000000, 64bit, no parity
WM32	0x04710190	0x824b36a3	;PSDMR: Precharge all banks
WM32	0x04710190	0xaa4b36a3
WM8	0x00000000	0x00	        ;Access SDRAM
WM32	0x04710190	0x8a4b36a3	;PSDMR: CBR Refresh
WM8	0x00000000	0xFF	        ;Access SDRAM
WM8	0x00000000	0xFF	        ;Access SDRAM
WM8	0x00000000	0xFF	        ;Access SDRAM
WM8	0x00000000	0xFF	        ;Access SDRAM
WM8	0x00000000	0xFF	        ;Access SDRAM
WM8	0x00000000	0xFF	        ;Access SDRAM
WM8	0x00000000	0xFF	        ;Access SDRAM
WM8	0x00000000	0xFF	        ;Access SDRAM
WM32	0x04710190	0x9a4b36a3	;PSDMR: Mode Set
WM8	0x00000190	0x00	        ;Access SDRAM
WM32	0x04710190	0xc24b36a3	;PSDMR: enable refresh, normal operation

CPUTYPE     8272        ;the CPU type
JTAGCLOCK   0           ;use 16 MHz JTAG clock
POWERUP     7000        ;start delay after power-up detected in ms
BOOTADDR    0xfff00100  ;boot address used for start-up break
WORKSPACE   0x04700000	;workspace in target RAM for fast download
;MEMDELAY    2000        ;additional memory access delay
MMU         XLAT        ; support virtual addresses (for Linux!)
BDIMODE     AGENT       ;the BDI working mode (LOADONLY | AGENT)
BREAKMODE   HARD        ;SOFT or HARD, HARD uses PPC hardware breakpoints
PTBASE      0x000000F0  ; ptr to page table pointers

FILE        u-boot.bin
;FILE        E:\temp\test16k.bin
;FORMAT      BIN 0x04708000
LOAD        MANUAL      ;load code MANUAL or AUTO after reset
PROMPT      8272>	;new prompt for Telnet
DUMP        dump.bin

CHIPTYPE    I28BX8     	; Flash type
CHIPSIZE    0x800000	; Single chip size (8 Mbyte)
BUSWIDTH    32		; total width for the whole SIMM
WORKSPACE   0x04700000	;workspace in target RAM for fast download
FILE        1MB_junk.bin
FORMAT      BIN 0xFF900000

ERASE       0xFF900000  ;erase sector  4 of flash SIMM
ERASE       0xFF940000  ;erase sector  5 of flash SIMM
ERASE       0xFF980000  ;erase sector  6 of flash SIMM
ERASE       0xFF9C0000  ;erase sector  7 of flash SIMM

DMM1        0x04700000
FILE        reg8272.def

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