[U-Boot-Users] [PATCH 7/8] Support Analogue Micro's ASP8347DB board. Implementation.
Pantelis Antoniou
pantelis at embeddedalley.com
Sat Dec 2 23:16:43 CET 2006
Add support for Analogue Micro's ASP8347DB board.
The board is originally shipped with RedBoot.
All appropriate settings are migrated to u-boot & the
old kernel booted; a drop in bootloader replacement.
---
Signed-off-by: Pantelis Antoniou <pantelis at embeddedalley.com>
---
MAKEALL | 3
Makefile | 3
board/asp8347db/Makefile | 52 ++++++
board/asp8347db/asp8347db.c | 371 +++++++++++++++++++++++++++++++++++++++++++
board/asp8347db/config.mk | 23 +++
board/asp8347db/fpga.c | 240 ++++++++++++++++++++++++++++
board/asp8347db/pci.c | 222 ++++++++++++++++++++++++++
board/asp8347db/u-boot.lds | 122 ++++++++++++++
include/status_led.h | 2
9 files changed, 1037 insertions(+), 1 deletions(-)
diff --git a/MAKEALL b/MAKEALL
index 74bf383..82ade78 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -130,7 +130,8 @@ LIST_8260=" \
#########################################################################
LIST_83xx=" \
- TQM834x MPC8349EMDS MPC8349ITX MPC8360EMDS \
+ ASP8347DB TQM834x MPC8349EMDS MPC8349ITX \
+ MPC8360EMDS \
"
diff --git a/Makefile b/Makefile
index d2534ab..4e5a78d 100644
--- a/Makefile
+++ b/Makefile
@@ -1588,6 +1588,9 @@ r5200_config : unconfig
## MPC83xx Systems
#########################################################################
+ASP8347DB_config: unconfig
+ @$(MKCONFIG) $(@:_config=) ppc mpc83xx asp8347db
+
TQM834x_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x
diff --git a/board/asp8347db/Makefile b/board/asp8347db/Makefile
new file mode 100644
index 0000000..a865a9b
--- /dev/null
+++ b/board/asp8347db/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# Copyright 2004 Freescale Semiconductor, Inc.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS = $(BOARD).o fpga.o pci.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/asp8347db/asp8347db.c b/board/asp8347db/asp8347db.c
new file mode 100644
index 0000000..10551d3
--- /dev/null
+++ b/board/asp8347db/asp8347db.c
@@ -0,0 +1,371 @@
+/*
+ * (C) Copyright 2006
+ * Pantelis Antoniou, Embedded Alley, pantelis at embeddedalley.com
+ *
+ * Based on tqm384x.c by
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#define DEBUG
+
+#include <common.h>
+#include <ioports.h>
+#include <mpc83xx.h>
+#include <asm/mpc8349_pci.h>
+#include <i2c.h>
+#include <spd.h>
+#include <miiphy.h>
+#include <asm-ppc/mmu.h>
+#include <pci.h>
+
+#ifdef CONFIG_REDBOOT
+#include <redboot.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define IOSYNC asm("eieio")
+#define ISYNC asm("isync")
+#define SYNC asm("sync")
+#define FPW FLASH_PORT_WIDTH
+#define FPWV FLASH_PORT_WIDTHV
+
+#define DDR_MAX_SIZE_PER_CS 0x20000000
+
+#define TIMING_CASLAT TIMING_CFG1_CASLAT_25
+#define MODE_CASLAT DDR_MODE_CASLAT_25
+
+#define INITIAL_CS_CONFIG (CSCONFIG_EN | CSCONFIG_ROW_BIT_12 | \
+ CSCONFIG_COL_BIT_9)
+
+/* External definitions */
+ulong flash_get_size (ulong base, int banknum);
+extern flash_info_t flash_info[];
+
+/* Local variable */
+static volatile immap_t *im = (immap_t *)CFG_IMMR;
+
+/**************************************************************************
+ * Board initialzation after relocation to RAM. Used to detect the number
+ * of Flash banks on TQM834x.
+ */
+int board_early_init_r (void)
+{
+ /* sanity check, IMMARBAR should be mirrored at offset zero of IMMR */
+ if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)
+ return 0;
+
+ /* setup GPIO ports */
+ im->pgio[0].dat = 0xc5f00000;
+ im->pgio[0].odr = 0;
+ im->pgio[0].dir = 0x3a700000;
+ im->pgio[0].imr = 0;
+ im->pgio[0].icr = 0;
+
+ im->pgio[1].dat = 0x00001000;
+ im->pgio[1].odr = 0;
+ im->pgio[1].dir = 0x00003000;
+ im->pgio[1].imr = 0;
+ im->pgio[1].icr = 0;
+
+ /* turn on all LEDS */
+ im->pgio[0].dat |= LED_ALL;
+ im->pgio[0].odr &= ~LED_ALL;
+ im->pgio[0].dir |= LED_ALL;
+
+ /* reset & enable ethernet */
+ udelay(100);
+ im->pgio[1].dat = (im->pgio[1].dat & ~ETH_RST) | ETH_EN;
+ udelay(100);
+ im->pgio[1].dat |= ETH_RST;
+ udelay(100);
+ im->pgio[1].dat &= ~ETH_EN;
+ udelay(100);
+
+ /* reset PHYs */
+ im->pgio[1].dat |= PHY1_RST | PHY2_RST;
+ udelay(250);
+ im->pgio[1].dat &= ~(PHY1_RST | PHY2_RST);
+ udelay(250);
+
+ /* turn off all leds */
+ im->pgio[0].dat &= ~LED_ALL;
+
+ return 0;
+}
+
+/**************************************************************************
+ * DRAM initalization and size detection
+ */
+long int initdram (int board_type)
+{
+ long size, known_size;
+
+ /* 128MB */
+ known_size = 128 << 20;
+
+ im->sysconf.ddrlaw[0].bar = 0;
+ im->sysconf.ddrlaw[0].ar = 0;
+
+ /* 128M */
+ im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE;
+ im->sysconf.ddrlaw[0].ar = LAWAR_EN | LAWAR_SIZE_128M;
+ im->sysconf.ddrlaw[1].bar = 0;
+ im->sysconf.ddrlaw[1].ar = 0;
+
+ /* set CS bounds to 128M */
+ im->ddr.sdram_cfg = 0x02000000;
+ im->ddr.csbnds[0].csbnds = 0x00000007;
+ im->ddr.csbnds[1].csbnds = 0;
+ im->ddr.csbnds[2].csbnds = 0;
+ im->ddr.csbnds[3].csbnds = 0;
+ im->ddr.cs_config[0] = 0x80800101;
+ im->ddr.cs_config[1] = 0;
+ im->ddr.cs_config[2] = 0;
+ im->ddr.cs_config[3] = 0;
+ im->ddr.timing_cfg_1 = 0x36332321;
+ im->ddr.timing_cfg_2 = 0x02000400;
+ im->ddr.sdram_cfg = 0x02000000;
+ im->ddr.sdram_mode = 0x00000062;
+ SYNC;
+
+ im->ddr.sdram_interval = 0x03e80000;
+ im->ddr.sdram_clk_cntl = 0x81000000;
+ SYNC;
+
+ /* the errata workaround from TQM does not work */
+ /* I don't really know why, */
+
+ udelay(200);
+
+ im->ddr.sdram_cfg = 0xc2000000;
+ SYNC;
+
+ udelay(1000);
+
+ /* size detection */
+ debug("\n");
+ size = get_ram_size(CFG_DDR_BASE, known_size);
+ if (size != known_size)
+ debug("Detected other size than what expected!\n");
+
+ return size;
+}
+
+/**************************************************************************
+ * checkboard()
+ */
+int checkboard (void)
+{
+ puts("Board: ASP8347DB\n");
+
+#ifdef CONFIG_PCI
+ volatile immap_t * immr;
+ u32 w, f;
+
+ immr = (immap_t *)CFG_IMMR;
+ if (!(immr->reset.rcwh & RCWH_PCIHOST)) {
+ printf("PCI: NOT in host mode..?!\n");
+ return 0;
+ }
+
+ /* get bus width */
+ w = 32;
+ if (immr->reset.rcwh & RCWH_PCI64)
+ w = 64;
+
+ /* get clock */
+ f = gd->pci_clk;
+
+ printf("PCI1: %d bit, %d MHz\n", w, f / 1000000);
+#else
+ printf("PCI: disabled\n");
+#endif
+ return 0;
+}
+
+/* in fpga.c */
+extern int asp8347db_init_fpga(void);
+extern int asp8347db_autoload_fpga(void);
+
+/*
+ * Miscellaneous intialization
+ */
+int misc_init_r (void)
+{
+#ifdef CONFIG_FPGA
+ asp8347db_init_fpga();
+#endif
+ return 0;
+}
+
+/*
+ * Final init hook before entering command loop.
+ */
+int last_stage_init (void)
+{
+#ifdef CONFIG_REDBOOT
+ const char *s;
+ void *fis;
+ flash_info_t *info;
+ int migrated;
+ static const char *image_name = "ASP8347DB.FPGA";
+ ulong fpga_image_base = 0, fpga_image_size = 0;
+ ulong redboot_linux_base = 0, redboot_linux_size = 0;
+
+ /* we now migrate settings from redboot */
+ /* only we locate the FIS */
+ if ((s = getenv("redboot_migrated")) == NULL && *s != 'n' &&
+ (fis = redboot_fis_get(1, -1, &info)) != NULL) {
+
+ migrated = 0;
+
+ printf("REDB.:");
+
+ /* first snarf the FPGA image location from the FIS */
+ if (redboot_fis_setenv(info, fis, image_name, "flash_base",
+ "fpga_image_base") == 0 &&
+ (s = getenv("fpga_image_base")) != NULL)
+ fpga_image_base = simple_strtoul(s, NULL, 16);
+
+ if (redboot_fis_setenv(info, fis, image_name, "data_length",
+ "fpga_image_size") == 0 &&
+ (s = getenv("fpga_image_size")) != NULL)
+ fpga_image_size = simple_strtoul(s, NULL, 16);
+
+ if (fpga_image_base == 0 || fpga_image_size == 0) {
+ setenv("fpga_image_base", NULL);
+ setenv("fpga_image_size", NULL);
+ } else {
+ printf(" FPGA");
+ migrated += 2;
+ }
+
+ /* now get the ethernet addresses */
+ if (redboot_config_setenv(info, fis, "ethaddr",
+ "tsec1_esa", NULL) == 0 &&
+ getenv("ethaddr")) {
+ printf(" TSEC1");
+ migrated++;
+ }
+
+ if (redboot_config_setenv(info, fis, "eth1addr",
+ "tsec2_esa", NULL) == 0 &&
+ getenv("eth1addr")) {
+ printf(" TSEC2");
+ migrated++;
+ }
+
+ /* now get the linux image */
+ if (redboot_fis_setenv(info, fis, "Linux", "flash_base",
+ "redboot_linux_base") == 0 &&
+ (s = getenv("redboot_linux_base")) != NULL)
+ redboot_linux_base = simple_strtoul(s, NULL, 16);
+
+ if (redboot_fis_setenv(info, fis, "Linux", "data_length",
+ "redboot_linux_size") == 0 &&
+ (s = getenv("redboot_linux_size")) != NULL)
+ redboot_linux_size = simple_strtoul(s, NULL, 16);
+
+ if (redboot_linux_base == 0 || redboot_linux_size == 0) {
+ setenv("redboot_linux_base", NULL);
+ setenv("redboot_linux_size", NULL);
+ } else {
+ setenv("bootcmd", "redboot exec ${redboot_linux_base}");
+
+ printf(" Linux");
+ migrated += 2;
+ }
+
+ if (migrated > 0) {
+ printf(".\n");
+ setenv("redboot_migrated", "y");
+ } else {
+ printf("No variables migrated!\n");
+ }
+
+ }
+#endif
+
+#ifdef CONFIG_FPGA
+ asp8347db_autoload_fpga();
+#endif
+ return 0;
+}
+
+/* immediate return - no printing from redboot */
+volatile void __attribute__((noinline)) redboot_nothing(void) { }
+
+void board_redboot_bd_t_adapt(void *kbd,
+ ulong cmd_start, ulong cmd_end,
+ ulong initrd_start, ulong initrd_end)
+{
+ static bd_t ubd;
+ redboot_bd_t *rbd;
+
+ /* keep u-boot's idea of a bd_t */
+ ubd = *(bd_t *)kbd;
+
+ /* point redboot bd at the old uboot space
+ * we make sure that the area is large enough to hold both
+ */
+ rbd = kbd;
+ memset(rbd, 0, sizeof(*rbd));
+
+ /* now fill in redboot bd_t with the proper values */
+ rbd->bi_tag = 0x42444944;
+ rbd->bi_size = sizeof(*rbd);
+ rbd->bi_revision = 0x0102;
+ rbd->bi_bdate = 0x04012005;
+ rbd->bi_memstart = ubd.bi_memstart;
+ rbd->bi_memsize = ubd.bi_memsize;
+ rbd->bi_baudrate = ubd.bi_baudrate;
+ rbd->bi_cmdline = (unsigned char *)cmd_start;
+ memcpy(rbd->bi_enetaddr, ubd.bi_enetaddr, 6);
+ memcpy(rbd->bi_esa[0], ubd.bi_enetaddr, 6);
+#ifdef CONFIG_HAS_ETH1
+ memcpy(rbd->bi_esa[1], ubd.bi_enet1addr, 6);
+#endif
+#ifdef CONFIG_HAS_ETH2
+ memcpy(rbd->bi_esa[2], ubd.bi_enet2addr, 6);
+#endif
+#ifdef CONFIG_HAS_ETH3
+ memcpy(rbd->bi_esa[3], ubd.bi_enet3addr, 6);
+#endif
+ rbd->bi_ramdisk_begin = initrd_start;
+ rbd->bi_ramdisk_end = initrd_end;
+ rbd->bi_intfreq = ubd.bi_intfreq;
+ rbd->bi_busfreq = ubd.bi_busfreq;
+ rbd->bi_immr = ubd.bi_immrbar;
+ rbd->bi_flashbase = 0xf0000000;
+ rbd->bi_flashsize = 0x04000000;
+ rbd->bi_flashwidth = 16;
+
+ /* I/O functions */
+ /* we assume we don't overwrite them */
+ /* we are running pretty low & the stack is */
+ /* placed at the end of memory */
+ rbd->bi_cputc = (void *)redboot_nothing;
+ rbd->bi_cgetc = (void *)redboot_nothing;
+ rbd->bi_ctstc = (void *)redboot_nothing;
+}
+
diff --git a/board/asp8347db/config.mk b/board/asp8347db/config.mk
new file mode 100644
index 0000000..c3c8574
--- /dev/null
+++ b/board/asp8347db/config.mk
@@ -0,0 +1,23 @@
+#
+# Copyright 2004 Freescale Semiconductor, Inc.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0xf0000000
diff --git a/board/asp8347db/fpga.c b/board/asp8347db/fpga.c
new file mode 100644
index 0000000..389ec56
--- /dev/null
+++ b/board/asp8347db/fpga.c
@@ -0,0 +1,240 @@
+/*
+ * (C) Copyright 2006 - Embedded Alley Solutions Inc.
+ * by Pantelis Antoniou, pantelis at embeddedalley.com
+ *
+ * Based on board/asp8347db/fpga.c
+ * (C) Copyright 2002
+ * by Rich Ireland, Enterasys Networks, rireland at enterasys.com.
+ * & Keith Outwater, keith_outwater at mvis.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+/*
+ * EC FPGA configuration support for the ASP8437DB computer
+ */
+
+#include <common.h>
+#include <command.h>
+#include <watchdog.h>
+#include <flash.h>
+
+#include <lattice_ec.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if (CONFIG_FPGA)
+
+#if 0
+#define ASP8437DB_FPGA_DEBUG
+#endif
+
+#ifdef ASP8437DB_FPGA_DEBUG
+#define PRINTF(fmt,args...) printf (fmt ,##args)
+#else
+#define PRINTF(fmt,args...)
+#endif
+
+static void mdelay(int ms)
+{
+ ulong start = get_timer(0);
+ ulong delay;
+
+ delay = (ms * CFG_HZ) / 1000;
+ while (get_timer(start) < delay) {
+ udelay (1000);
+ WATCHDOG_RESET(); /* Trigger watchdog, if needed */
+ }
+}
+
+int rattler_fpga_loaded = 0;
+
+/****************************************************************/
+
+/* configure */
+static int rattler_pre_fn (int cookie)
+{
+ volatile immap_t *im = (immap_t *)CFG_IMMR;
+
+ PRINTF ("%s:%d:\n", __FUNCTION__, __LINE__);
+
+ im->pgio[0].dir &= ~(ECP_TMS | ECP_TCK | ECP_TDI | ECP_TDO | FPGA_RST);
+ im->pgio[0].dat |= ECP_TMS | ECP_TCK | ECP_TDI | FPGA_RST;
+ im->pgio[0].dir |= ECP_TMS | ECP_TCK | ECP_TDI | FPGA_RST;
+
+ /* and now reset */
+ im->pgio[0].dat |= FPGA_RST;
+ udelay(1000);
+ im->pgio[0].dat &= ~FPGA_RST;
+
+ rattler_fpga_loaded = 0;
+
+ return 0;
+}
+
+static int rattler_post_fn (int cookie, int success)
+{
+ PRINTF ("%s:%d:\n", __FUNCTION__, __LINE__);
+
+ if (!success)
+ return -1;
+
+ /* FLASH LEDs so we know FPGA is alive */
+ *(unsigned long *)(ASP8347DB_FPGA_BASE + 0xC) = 0x00; /* off */
+ mdelay(1000);
+ *(unsigned long *)(ASP8347DB_FPGA_BASE + 0xC) = 0x55; /* toggle */
+ mdelay(500);
+ *(unsigned long *)(ASP8347DB_FPGA_BASE + 0xC) = 0xAA; /* toggle */
+ mdelay(500);
+ *(unsigned long *)(ASP8347DB_FPGA_BASE + 0xC) = 0x00; /* off */
+
+ rattler_fpga_loaded = 1;
+
+ return 0;
+}
+
+static void rattler_jtag_write_port_fn(int cookie, unsigned int pin,
+ unsigned int val)
+{
+ volatile immap_t *im = (immap_t *)CFG_IMMR;
+ u32 mask = 0;
+
+ switch (pin) {
+ case LATTICE_JTAG_TDI:
+ mask = ECP_TDI;
+ break;
+
+ case LATTICE_JTAG_TCK:
+ mask = ECP_TCK;
+ break;
+
+ case LATTICE_JTAG_TMS:
+ mask = ECP_TMS;
+ break;
+
+ case LATTICE_JTAG_RST:
+ mask = FPGA_RST;
+ break;
+
+ case LATTICE_JTAG_CE: /* not present */
+ break;
+
+ default:
+ PRINTF("Illegal pin %d\n", pin);
+ break;
+ }
+
+ /* not supported */
+ if (mask == 0)
+ return;
+
+ if (val)
+ im->pgio[0].dat |= mask;
+ else
+ im->pgio[0].dat &= ~mask;
+}
+
+static int rattler_jtag_read_port_fn(int cookie)
+{
+ volatile immap_t *im = (immap_t *)CFG_IMMR;
+
+ return !!(im->pgio[0].dat & ECP_TDO);
+}
+
+/* Note that these are pointers to code that is in Flash. They will be
+ * relocated at runtime.
+ */
+static Lattice_EC_JTAG_fns fpga_fns = {
+ .pre = rattler_pre_fn,
+ .post = rattler_post_fn,
+ .jtag_write_port = rattler_jtag_write_port_fn,
+ .jtag_read_port = rattler_jtag_read_port_fn,
+};
+
+Lattice_desc fpga[CONFIG_FPGA_COUNT] = {
+ {
+ Lattice_EC,
+ lattice_jtag_mode,
+ 65536, /* XXX */
+ &fpga_fns,
+ 0 }
+};
+
+/*
+ * Initialize the fpga. Return 1 on success, 0 on failure.
+ */
+int asp8347db_init_fpga(void)
+{
+ int i;
+
+ PRINTF ("%s:%d: Initialize FPGA interface"
+ " (relocation offset = 0x%.8lx)\n",
+ __FUNCTION__, __LINE__, gd->reloc_off);
+ fpga_init (gd->reloc_off);
+
+ for (i = 0; i < CONFIG_FPGA_COUNT; i++) {
+ PRINTF ("%s:%d: Adding fpga %d\n", __FUNCTION__,
+ __LINE__, i);
+ fpga_add (fpga_lattice, &fpga[i]);
+ }
+ return 1;
+}
+
+extern int lattice_load (Lattice_desc * desc, void *buf, size_t bsize);
+
+/*
+ * Autoload the fpga. Return 1 on success, 0 on failure.
+ */
+int asp8347db_autoload_fpga(void)
+{
+ char *value;
+ ulong base = 0, size = 0;
+ int ret;
+
+ /* disable autoload set? */
+ value = getenv("fpga_autoload_disable");
+ if (value && *value == 'y') {
+ printf("FPGA: Autoload disabled; load manually...\n");
+ return 0;
+ }
+
+ if ((value = getenv("fpga_image_base")) != NULL)
+ base = simple_strtoul(value, NULL, 16);
+
+ if ((value = getenv("fpga_image_size")) != NULL)
+ size = simple_strtoul(value, NULL, 16);
+
+ if (base == 0 || size == 0) {
+ PRINTF("FPGA image variables not found\n");
+ return -1;
+ }
+
+ PRINTF("Autoloading FPGA\n");
+
+ ret = lattice_load(&fpga[0], (void *)base, (size_t)size);
+ if (ret != 0)
+ PRINTF("Autoloading FPGA failed with error %d\n", ret);
+
+ return ret;
+}
+
+#endif
+
+/* vim: set ts=8 tw=78 sw=8: */
diff --git a/board/asp8347db/pci.c b/board/asp8347db/pci.c
new file mode 100644
index 0000000..5ecf101
--- /dev/null
+++ b/board/asp8347db/pci.c
@@ -0,0 +1,222 @@
+/*
+ * (C) Copyright 2005
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <asm/mmu.h>
+#include <common.h>
+#include <pci.h>
+
+#ifdef CONFIG_PCI
+
+/* System RAM mapped to PCI space */
+#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE
+#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE
+#define CONFIG_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024)
+
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_tqm834x_config_table[] = {
+ {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+ PCI_IDSEL_NUMBER, PCI_ANY_ID,
+ pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
+ PCI_ENET0_MEMADDR,
+ PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
+ }
+ },
+ {}
+};
+#endif
+
+static struct pci_controller pci1_hose = {
+#ifndef CONFIG_PCI_PNP
+ config_table:pci_tqm834x_config_table,
+#endif
+};
+
+
+/**************************************************************************
+ * pci_init_board()
+ *
+ * NOTICE: MPC8349 internally has two PCI controllers (PCI1 and PCI2) but since
+ * per ASP8347DB design physical connections to external devices (PCI sockets)
+ * are routed only to the PCI1 we do not account for the second one - this code
+ * supports PCI1 module only. Should support for the PCI2 be required in the
+ * future it needs a separate pci_controller structure (above) and handling -
+ * please refer to other boards' implementation for dual PCI host controllers,
+ * for example board/Marvell/db64360/pci.c, pci_init_board()
+ *
+ */
+void
+pci_init_board(void)
+{
+ volatile immap_t * immr;
+ volatile clk83xx_t * clk;
+ volatile law83xx_t * pci_law;
+ volatile pot83xx_t * pci_pot;
+ volatile pcictrl83xx_t * pci_ctrl;
+ volatile pciconf83xx_t * pci_conf;
+ u16 reg16;
+ u32 reg32;
+ struct pci_controller * hose;
+
+ immr = (immap_t *)CFG_IMMR;
+ clk = (clk83xx_t *)&immr->clk;
+ pci_law = immr->sysconf.pcilaw;
+ pci_pot = immr->ios.pot;
+ pci_ctrl = immr->pci_ctrl;
+ pci_conf = immr->pci_conf;
+
+ hose = &pci1_hose;
+
+ /*
+ * Configure PCI controller and PCI_CLK_OUTPUT
+ */
+
+ /*
+ * WARNING! only PCI_CLK_OUTPUT1 is enabled here as this is the one
+ * line actually used for clocking all external PCI devices in TQM83xx.
+ * Enabling other PCI_CLK_OUTPUT lines may lead to board's hang for
+ * unknown reasons - particularly PCI_CLK_OUTPUT6 and PCI_CLK_OUTPUT7
+ * are known to hang the board; this issue is under investigation
+ * (13 oct 05)
+ */
+ reg32 = OCCR_PCICOE1;
+#if 0
+ /* enabling all PCI_CLK_OUTPUT lines HANGS the board... */
+ reg32 = 0xff000000;
+#endif
+ if (clk->spmr & SPMR_CKID) {
+ /* PCI Clock is half CONFIG_83XX_CLKIN so need to set up OCCR
+ * fields accordingly */
+ reg32 |= (OCCR_PCI1CR | OCCR_PCI2CR);
+
+ reg32 |= (OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 \
+ | OCCR_PCICD3 | OCCR_PCICD4 | OCCR_PCICD5 \
+ | OCCR_PCICD6 | OCCR_PCICD7);
+ }
+
+ clk->occr = reg32;
+ udelay(2000);
+
+ /*
+ * Release PCI RST Output signal
+ */
+ pci_ctrl[0].gcr = 0;
+ udelay(2000);
+ pci_ctrl[0].gcr = 1;
+ udelay(2000);
+
+ /*
+ * Configure PCI Local Access Windows
+ */
+ pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
+ pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M;
+
+ pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
+ pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_16M;
+
+ /*
+ * Configure PCI Outbound Translation Windows
+ */
+
+ /* PCI1 mem space */
+ pci_pot[0].potar = (CFG_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[0].pobar = (CFG_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[0].pocmr = POCMR_EN | (POCMR_CM_512M & POCMR_CM_MASK);
+
+ /* PCI1 IO space */
+ pci_pot[1].potar = (CFG_PCI1_IO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[1].pobar = (CFG_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[1].pocmr = POCMR_EN | POCMR_IO | (POCMR_CM_16M & POCMR_CM_MASK);
+
+ /*
+ * Configure PCI Inbound Translation Windows
+ */
+
+ /* we need RAM mapped to PCI space for the devices to
+ * access main memory */
+ pci_ctrl[0].pitar1 = 0x0;
+ pci_ctrl[0].pibar1 = 0x0;
+ pci_ctrl[0].piebar1 = 0x0;
+ pci_ctrl[0].piwar1 = PIWAR_EN | PIWAR_PF | \
+ PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP | \
+ PIWAR_IWS_256M;
+
+ hose->first_busno = 0;
+ hose->last_busno = 0xff;
+
+ /* PCI memory space */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI1_MEM_BASE,
+ CFG_PCI1_MEM_PHYS,
+ CFG_PCI1_MEM_SIZE,
+ PCI_REGION_MEM);
+
+ /* PCI IO space */
+ pci_set_region(hose->regions + 1,
+ CFG_PCI1_IO_BASE,
+ CFG_PCI1_IO_PHYS,
+ CFG_PCI1_IO_SIZE,
+ PCI_REGION_IO);
+
+ /* System memory space */
+ pci_set_region(hose->regions + 2,
+ CONFIG_PCI_SYS_MEM_BUS,
+ CONFIG_PCI_SYS_MEM_PHYS,
+ CONFIG_PCI_SYS_MEM_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ hose->region_count = 3;
+
+ pci_setup_indirect(hose,
+ (CFG_IMMR+0x8300),
+ (CFG_IMMR+0x8304));
+
+ pci_register_hose(hose);
+
+ /*
+ * Write to Command register
+ */
+ reg16 = 0xff;
+ pci_hose_read_config_word (hose, PCI_BDF(0,0,0), PCI_COMMAND,
+ ®16);
+ reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ pci_hose_write_config_word(hose, PCI_BDF(0,0,0), PCI_COMMAND,
+ reg16);
+
+ /*
+ * Clear non-reserved bits in status register.
+ */
+ pci_hose_write_config_word(hose, PCI_BDF(0,0,0), PCI_STATUS,
+ 0xffff);
+ pci_hose_write_config_byte(hose, PCI_BDF(0,0,0), PCI_LATENCY_TIMER,
+ 0x80);
+
+#ifdef CONFIG_PCI_SCAN_SHOW
+ printf("PCI: Bus Dev VenId DevId Class Int\n");
+#endif
+ /*
+ * Hose scan.
+ */
+ hose->last_busno = pci_hose_scan(hose);
+}
+#endif /* CONFIG_PCI */
diff --git a/board/asp8347db/u-boot.lds b/board/asp8347db/u-boot.lds
new file mode 100644
index 0000000..020cfa6
--- /dev/null
+++ b/board/asp8347db/u-boot.lds
@@ -0,0 +1,122 @@
+/*
+ * Copyright 2004 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ cpu/mpc83xx/start.o (.text)
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ . = ALIGN(16);
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x0FFF) & 0xFFFFF000;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+ __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(4096);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(4096);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
+ENTRY(_start)
diff --git a/include/status_led.h b/include/status_led.h
index db4c60f..52fb233 100644
--- a/include/status_led.h
+++ b/include/status_led.h
@@ -355,6 +355,8 @@ void status_led_set (int led, int state);
# define STATUS_LED_ACTIVE 0 /* LED on for bit == 0 */
# define STATUS_LED_BOOT 0 /* LED 0 used for boot status */
+#elif defined(CONFIG_ASP8347DB)
+/* XXX empty just to avoid the error */
#else
# error Status LED configuration missing
#endif
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