[U-Boot-Users] Porting U-Boot to AMCC 440 Spe

Wolfgang Denk wd at denx.de
Mon Dec 11 15:09:48 CET 2006


In message <HBEJJCJKELFDJDFGMGGHMEBFDGAA.wo at mpstor.com> you wrote:
> 
> Has anybody ported U-Boot to the AMCC 440-Spe processor at PVR version
> 53421891.

U-Boot is running fine on a Yucca Rev. B here:

U-Boot 1.1.5 (Nov 10 2006 - 08:45:01)

CPU:   AMCC PowerPC 440SPe Rev. B at 533.328 MHz (PLB=133, OPB=66, EBC=66 MHz)
       I2C boot EEPROM enabled
       Bootstrap Option C - Boot ROM Location I2C (Addr 0x54)
       Internal PCI arbiter enabled
       32 kB I-Cache 32 kB D-Cache
Board: Yucca - AMCC 440SPe Evaluation Board
I2C:   ready
DRAM:  1024 MB
FLASH:  5 MB
PCI:   Bus Dev VenId DevId Class Int
        00  01  1000  0054  0100  00
PCIE:1 successfully set as rootpoint
        01  01  1095  3132  0180  00
PCIE:2 successfully set as rootpoint
        02  01  1095  3132  0180  00
In:    serial
Out:   serial
Err:   serial
Net:   ppc_4xx_eth0

Type "run flash_nfs" to mount root filesystem over NFS

Hit any key to stop autoboot:  0 


> 2. When running this same code on our board with PVR version 53421891 (revB
> silicon) we always have an ESR set to 0x8000000, as soon as we enable the
> MSR[ME] Bit is set we of course get a machine check.
> 
> 3. We have tried a Denx patch to write all three words of the TLB table (to
> make sure no parity errors are occuring) however we still have the problem.
> 
> 4. We have applied a Denx patch to write the TLB table depending on whether
> its revA or revB silicon.
> 
> Neither patch has cured the problem?

Please make sure to use a current version of the U-Boot code. Support
for  440SPe  rev.  B.  needs  at  least   the   version   tagged   as
LABEL_2006_06_30_2020, or better top of tree in the git repo.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
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