[U-Boot-Users] Re: Problem with the cfi flash driver with ax8/x16 flash configuredinx8 mode.

[Txema Lopez]

Bastos Fernandez Alexandre wrote:

Hi Alex,

>Txema,
>
>  
>
>>>I think your topic is very similar to this recent one:
>>>
>>>http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/19970
>>>
>>>
>>>      
>>>
>>OK, I've checked it.
>>
>>    
>>
>>>and previous similar patches have been submited and are still
>>>pending (but it seems they are coming, read the whole thread)
>>>
>>>
>>>      
>>>
>>But not the patch that Wolfgang proposed, isn'it?
>>
>>    
>>
>
>Wolfgang proposes shifting the commands as a solution. This is
>the way it's done in some patches already submitted, (mine as
>an example ;-D ) ...
>
>http://sourceforge.net/mailarchive/message.php?msg_id=12799051
>  
>
What "shifting the commands" means ? I though the problem was with the 
addresses.

>  
>
>>I think the patch that Wolfgang proposed could be like that. I've tested
>>it with a S29GL128N x8/x16 in x8 mode. It works fine. But I have no idea
>>what would happen in  x16 mode or others modes. I haven't the hardware
>>to check it.
>>    
>>
>
>I think this may work for x16 but would break support for x32, x64
>as portwidth can be ...
>FLASH_CFI_8BIT          0x01
>FLASH_CFI_16BIT         0x02
>FLASH_CFI_32BIT         0x04
>FLASH_CFI_64BIT         0x08
>
>but AMD_ADDR_* for x16, x32 and x64 is the same
>  
>
I see. Anyway, why not define ?

#define AMD_ADDR_ERASE_START   ((info->portwidth == FLASH_CFI_8BIT) ? 
0xAAA : 0x555)
#define AMD_ADDR_START                ((info->portwidth == 
FLASH_CFI_8BIT) ? 0xAAA : 0x555)
#define AMD_ADDR_ACK                    ((info->portwidth == 
FLASH_CFI_8BIT) ? 0x555 : 0x2AA)

I think is cleaner to change one define than the code. What do you think?

>
>  
>
>>--- ../tmp/u-boot/drivers/cfi_flash.c   2006-01-12 12:22:08.000000000
>>    
>>
>+0100
>  
>
>>+++ drivers/cfi_flash.c 2006-01-12 17:21:19.000000000 +0100
>>@@ -107,9 +107,10 @@
>>
>> #define AMD_STATUS_TOGGLE              0x40
>> #define AMD_STATUS_ERROR               0x20
>>-#define AMD_ADDR_ERASE_START           0x555
>>-#define AMD_ADDR_START                 0x555
>>-#define AMD_ADDR_ACK                   0x2AA
>>+
>>+#define AMD_ADDR_ERASE_START           (0xAAA >> (info->portwidth-1))
>>+#define AMD_ADDR_START                 (0xAAA >> (info->portwidth-1))
>>+#define AMD_ADDR_ACK                   (0x555 >> (info->portwidth-1))
>>
>> #define FLASH_OFFSET_CFI               0x55
>> #define FLASH_OFFSET_CFI_RESP          0x10
>>
>>    
>>
>
>
>Also, take a look a this pathc for buffer write support:
>
>http://sourceforge.net/mailarchive/message.php?msg_id=12797909
>  
>
Ok, I'll test it in my board.

>
>Best regards,
>
>Alex BASTOS
>
>
>
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Best Regard,
Txema
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