[U-Boot-Users] [git patch] mpc83xx

[Kumar Gala]

Please pull from 'mpc83xx' branch of
git.kernel.org:/pub/scm/boot/u-boot/u-boot.git

to receive the following updates:

 CHANGELOG                    |   16 ++++++++++++++++
 cpu/mpc83xx/cpu_init.c       |   16 ++++++++++++++--
 cpu/mpc83xx/interrupts.c     |   10 ++++++++++
 cpu/mpc83xx/start.S          |    6 ++++++
 include/asm-ppc/immap_83xx.h |    4 ++--
 include/configs/MPC8349ADS.h |    4 ++++
 include/configs/TQM834x.h    |    4 ++++
 7 files changed, 56 insertions(+), 4 deletions(-)

Kumar Gala:
      Make System IO Config Registers board configurable on MPC83xx
      Enable time handling on 83xx
      Allow config of GPIO direction & data registers at boot on 83xx
      Only disable the MPC83xx watchdog if its enabled out of reset.
      Fixed defines for MPC83xx SICRL register to match current specs

diff --git a/CHANGELOG b/CHANGELOG
index c1da98f..12856fb 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,22 @@
 Changes since U-Boot 1.1.4:
 ======================================================================
 
+* Fixed defines for MPC83xx SICRL register to match current specs
+  Patch by Kumar Gala, 23 Jan 2006
+
+* Only disable the MPC83xx watchdog if its enabled out of reset.
+  If its disabled out of reset SW can later enable it if so desired
+  Patch by Kumar Gala, 11 Jan 2006
+
+* Allow config of GPIO direction & data registers at boot on 83xx
+  Patch by Kumar Gala, 11 Jan 2006
+
+* Enable time handling on 83xx
+  Patch by Kumar Gala, 11 Jan 2006
+
+* Make System IO Config Registers board configurable on MPC83xx
+  Patch by Kumar Gala, 11 Jan 2006
+
 * Add support for 28F256J3A flah (=> 64 MB) on PM520 board
 
 * Fix compiler problem with at91rm9200dk board.
diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index dcb3445..db28a6a 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -63,8 +63,12 @@ void cpu_init_f (volatile immap_t * im)
 	im->sysconf.spcr |= SPCR_TBEN;
 
 	/* System General Purpose Register */
-	im->sysconf.sicrh = SICRH_TSOBI1;
-	im->sysconf.sicrl = SICRL_LDP_A;
+#ifdef CFG_SICRH
+	im->sysconf.sicrh = CFG_SICRH;
+#endif
+#ifdef CFG_SICRL
+	im->sysconf.sicrl = CFG_SICRL;
+#endif
 
 	/*
 	 * Memory Controller:
@@ -150,6 +154,14 @@ void cpu_init_f (volatile immap_t * im)
 	im->sysconf.lblaw[7].bar = CFG_LBLAWBAR7_PRELIM;
 	im->sysconf.lblaw[7].ar = CFG_LBLAWAR7_PRELIM;
 #endif
+#ifdef CFG_GPIO1_PRELIM
+	im->pgio[0].dir = CFG_GPIO1_DIR;
+	im->pgio[0].dat = CFG_GPIO1_DAT;
+#endif
+#ifdef CFG_GPIO2_PRELIM
+	im->pgio[1].dir = CFG_GPIO2_DIR;
+	im->pgio[1].dat = CFG_GPIO2_DAT;
+#endif
 }
 
 
diff --git a/cpu/mpc83xx/interrupts.c b/cpu/mpc83xx/interrupts.c
index 53474f6..dfd51c1 100644
--- a/cpu/mpc83xx/interrupts.c
+++ b/cpu/mpc83xx/interrupts.c
@@ -43,6 +43,16 @@ struct irq_action {
 
 int interrupt_init_cpu (unsigned *decrementer_count)
 {
+	DECLARE_GLOBAL_DATA_PTR;
+
+	volatile immap_t *immr = (immap_t *) CFG_IMMRBAR;
+
+	*decrementer_count = (gd->bus_clk / 4) / CFG_HZ;
+
+	/* Enable e300 time base */
+
+	immr->sysconf.spcr |= 0x00400000;
+
 	return 0;
 }
 
diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S
index fb001a6..0e1a5fd 100644
--- a/cpu/mpc83xx/start.S
+++ b/cpu/mpc83xx/start.S
@@ -426,8 +426,14 @@ init_e300_core: /* time t 10 */
 #else
 	/* Disable Wathcdog  */
 	/*-------------------*/
+	lwz r4, SWCRR(r3)
+	/* Check to see if its enabled for disabling
+	   once disabled by SW you can't re-enable */
+	andi. r4, r4, 0x4
+	beq 1f
 	xor r4, r4, r4
 	stw r4, SWCRR(r3)
+1:
 #endif /* CONFIG_WATCHDOG */
 
 	/* Initialize the Hardware Implementation-dependent Registers */
diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index 6c2c712..f5fec22 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -71,8 +71,8 @@ typedef struct sysconf8349 {
 			| SPCR_TSEC2DP | SPCR_TSEC2BDP | SPCR_TSEC2EP)
 	u32 sicrl; /* System General Purpose Register Low */
 #define SICRL_LDP_A   0x80000000
-#define SICRL_USB0    0x40000000
-#define SICRL_USB1    0x20000000
+#define SICRL_USB1    0x40000000
+#define SICRL_USB0    0x20000000
 #define SICRL_UART    0x0C000000
 #define SICRL_GPIO1_A 0x02000000
 #define SICRL_GPIO1_B 0x01000000
diff --git a/include/configs/MPC8349ADS.h b/include/configs/MPC8349ADS.h
index d6d2fab..f7f09b8 100644
--- a/include/configs/MPC8349ADS.h
+++ b/include/configs/MPC8349ADS.h
@@ -506,6 +506,10 @@
 	HRCWH_TSEC2M_IN_GMII )
 #endif
 
+/* System IO Config */
+#define CFG_SICRH	SICRH_TSOBI1
+#define CFG_SICRL	SICRL_LDP_A
+
 #define CFG_HID0_INIT 0x000000000
 
 #define CFG_HID0_FINAL CFG_HID0_INIT
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 41f44c5..1cf66a9 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -417,6 +417,10 @@ extern int tqm834x_num_flash_banks;
 	HRCWH_TSEC2M_IN_GMII )
 #endif
 
+/* System IO Config */
+#define CFG_SICRH	SICRH_TSOBI1
+#define CFG_SICRL	SICRL_LDP_A
+
 /* i-cache and d-cache disabled */
 #define CFG_HID0_INIT		0x000000000
 #define CFG_HID0_FINAL		CFG_HID0_INIT