[U-Boot-Users] MPC83xx data cache lock?
DaveLiu at freescale.com
Tue May 23 11:13:57 CEST 2006
What is the [non-existent] write performance? Can you tell me?
In message <9FCDBA58F226D911B202000BDBAD4673026FD90F at zch01exm40.ap.freescale.net> you wrote:
> MPC83xx data cache locked all ways in u-boot. This means data cache
> looks like cache-inhibit. when kernel run at this u-boot, kernel don't
> unlock data cache, so the data cache actually run at inhibited state.
> I suggest we need unlock data cache after re locate_code in start.S
Can you please retrict your line legth to the usual 70 characters or so? Thanks.
> If unlock data cache in start.S file, we need change everything, such
> as BATs settings and DDR ECC test code. I have found some bugs in ECC
> test code.
Ummm.... Can you please be a bit more specific? I'm definitely
interested in details. Did you find any way to improve the
[non-existent] write performance?
> Content-Type: text/html
> Content-Transfer-Encoding: base64
And please, don't post HTML, especially not encoded as base64 which is a double PITA.
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de It is dangerous to be sincere unless you are also stupid.
- George Bernard Shaw
More information about the U-Boot