[U-Boot-Users] RFC: Xilinx Spartan3 relocation code

Bruce_Leonard at selinc.com Bruce_Leonard at selinc.com
Tue Aug 21 21:39:56 CEST 2007


Matthias Fuchs <matthias.fuchs at esd-electronics.com> wrote on 08/21/2007 
01:52:25 AM:

> Bruce,
> 
> what kind of bitstream file do you download to your FPGA?
> A .bit File? In this case we should put the bit mirroring into the

We've used a .bit file with the loadb command and a .bin file with the 
load command.  Both work fine as long as we're not bit-swapping in the 
code because we have the FPGA wired "correctly" to the processor.  I use 
the term "correctly" with some trepidateion because I'm sure some one will 
point out to me that there are lots of "correct" ways to design something 
;) .

Bruce




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