[U-Boot-Users] RFC: Xilinx Spartan3 relocation code

[Bruce_Leonard at selinc.com]

> In my understanding bitstream are those files that are generated 
> by xilinx' bitgen tool. Those files always have the same bit order.
> You can use U-Boot's fpga load command to download them to FPGAs
> in slave serial mode. The left bit is shifted out first.
>

And in parallel mode as well.  Just have to keep track of how the MSB on 
the processor is wired to the MSB of the FPGA to know if you need to do 
bit-swapping or not.
 
> 
> I noticed that you can also use the xilinx promgen tool to generate a 
> programming file (I do not use those files). These files can (and need 
not)
> have a different bit order. But do they have the nice header that is 

AFAIK, those programming files are targeted to Xilinx PROMs so that an 
FPGA can be booted from a PROM rather than through a processor or 
microcontroller.  I'm sure you could write code to support them, but why 
would you want to when the bitgen tool gives you something that's already 
supported by u-boot?

> So what kind of images/bitstreams are you talking about? Do we really 
need
> to support all of them?
> 

Again, I think not.  I think we should only be supporting the 
images/bitstreams that are already supported (i.e., .bit and .bin files) 
and are well documented by Xilinx.  I'm sure the PROM files are probably 
documented somewhere, but until someone has a need for them I don't see 
any reason to be adding them to the code base.

Bruce