[U-Boot-Users] MPC8548E: possible to use L2 cache as SRAM to run U-Boot within?

[Sellathu]

Joerg Albert <jalbert <at> advaoptical.de> writes:

> 
> Hi,
> 
> I wonder if it is possible to configure the L2 cache as SRAM (512 KByte for the
> 8548E) and run U-Boot therein? Just want to cope with possible hardware errors
> on the DDR RAM interface in our first prototype.
> I'm aware of the CFG_DRAM_TEST option, but I'd prefer to have U-Boot running
> even without a working RAM.
> 

It is possible. I've tried this once with very older version of u-boot. 

-- 
Sellathu