[U-Boot-Users] [PATCH] Add Media5200 platform support
jrigby at freescale.com
jrigby at freescale.com
Wed Mar 7 18:50:44 CET 2007
From: John Rigby <jrigby at freescale.com>
Adds Freescale MPC5200 based Media platform support.
Signed-off-by: John Rigby <jrigby at freescale.com>
---
Makefile | 16 ++
board/media5200/Makefile | 49 +++++
board/media5200/config.mk | 50 +++++
board/media5200/media5200.c | 140 +++++++++++++++
board/media5200/mt46v32m16tg-75.h | 37 ++++
board/media5200/sdram.c | 144 +++++++++++++++
board/media5200/sdram.h | 34 ++++
board/media5200/u-boot.lds | 121 +++++++++++++
cpu/mpc5xxx/fec.c | 3 +-
include/configs/Media5200.h | 354 +++++++++++++++++++++++++++++++++++++
10 files changed, 947 insertions(+), 1 deletions(-)
create mode 100644 board/media5200/Makefile
create mode 100644 board/media5200/config.mk
create mode 100644 board/media5200/media5200.c
create mode 100644 board/media5200/mt46v32m16tg-75.h
create mode 100644 board/media5200/sdram.c
create mode 100644 board/media5200/sdram.h
create mode 100644 board/media5200/u-boot.lds
create mode 100644 include/configs/Media5200.h
diff --git a/Makefile b/Makefile
index 358d181..8e9c88d 100644
--- a/Makefile
+++ b/Makefile
@@ -611,6 +611,22 @@ motionpro_config: unconfig
@$(MKCONFIG) motionpro ppc mpc5xxx motionpro
+Media5200_config \
+Media5200_lowboot_config \
+Media5200_highboot_config: unconfig
+ @mkdir -p $(obj)include
+ @mkdir -p $(obj)board/media5200
+ @ >$(obj)include/config.h
+ @[ -z "$(findstring lowboot_,$@)" ] || \
+ { echo "TEXT_BASE = 0xFE000000" >$(obj)board/media5200/config.tmp ; \
+ echo "... with lowboot configuration" ; \
+ }
+ @[ -z "$(findstring highboot_,$@)" ] || \
+ { echo "TEXT_BASE = 0xFFF00000" >$(obj)board/media5200/config.tmp ; \
+ echo "... with highboot configuration" ; \
+ }
+ @$(MKCONFIG) -a Media5200 ppc mpc5xxx media5200
+
#########################################################################
## MPC8xx Systems
#########################################################################
diff --git a/board/media5200/Makefile b/board/media5200/Makefile
new file mode 100644
index 0000000..ae3f77c
--- /dev/null
+++ b/board/media5200/Makefile
@@ -0,0 +1,49 @@
+#
+# (C) Copyright 2003-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o sdram.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/media5200/config.mk b/board/media5200/config.mk
new file mode 100644
index 0000000..efde983
--- /dev/null
+++ b/board/media5200/config.mk
@@ -0,0 +1,50 @@
+
+#
+# (C) Copyright 2003-2004
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# Media5200 board:
+#
+# Valid values for TEXT_BASE are:
+#
+# 0xFFF00000 boot high (standard configuration)
+# 0xFE000000 boot low
+# 0x00100000 boot from RAM (for testing only)
+#
+
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
+ifndef TEXT_BASE
+## Standard: boot high
+TEXT_BASE = 0xFFF00000
+## For testing: boot from RAM
+# TEXT_BASE = 0x00100000
+endif
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+
+ifneq ($(OBJTREE),$(SRCTREE))
+# We are building u-boot in a separate directory, use generated
+# .lds script from OBJTREE directory.
+LDSCRIPT := $(OBJTREE)/board/$(BOARDDIR)/u-boot.lds
+endif
diff --git a/board/media5200/media5200.c b/board/media5200/media5200.c
new file mode 100644
index 0000000..c607720
--- /dev/null
+++ b/board/media5200/media5200.c
@@ -0,0 +1,140 @@
+/*
+ * (C) Copyright 2003-2004
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * (C) Copyright 2004
+ * Mark Jonas, Freescale Semiconductor, mark.jonas at freescale.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc5xxx.h>
+#include <pci.h>
+#include <i2c.h>
+
+#include "sdram.h"
+
+#include "mt46v32m16tg-75.h"
+
+#include <asm/mmu.h>
+#include <asm/processor.h>
+
+long int initdram(int board_type)
+{
+ sdram_conf_t sdram_conf;
+
+ sdram_conf.ddr = SDRAM_DDR;
+ sdram_conf.mode = SDRAM_MODE;
+ sdram_conf.emode = SDRAM_EMODE;
+ sdram_conf.control = SDRAM_CONTROL;
+ sdram_conf.config1 = SDRAM_CONFIG1;
+ sdram_conf.config2 = SDRAM_CONFIG2;
+ sdram_conf.tapdelay = SDRAM_TAPDELAY;
+ return mpc5xxx_sdram_init(&sdram_conf);
+}
+
+int checkboard(void)
+{
+ puts("Board: Media5200 ");
+
+/*
+ * Retrieve FPGA Revision.
+ */
+ printf("(FPGA %08X)\n", *(vu_long *) (CFG_FPGA_BASE + 0x400));
+
+ return 0;
+}
+
+/** get ethernet address from EEPROM if non in the env **/
+void board_get_enetaddr(uchar * addr)
+{
+ char ethaddr[20];
+
+ /* Initialize I2C */
+ i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE);
+
+ /* Read the 6 bytes containing the MAC at offset of 0x00 */
+ i2c_read(CFG_I2C_EEPROM_ADDR, CFG_EEPROM_MACADDR_OFFSET,
+ CFG_I2C_EEPROM_ADDR_LEN, addr, 6);
+
+ sprintf(ethaddr, "%02x:%02x:%02x:%02x:%02x:%02x",
+ addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
+
+ printf("*** Using default MAC address from the EEPROM: %s ***\n\n",
+ ethaddr);
+ setenv("ethaddr", ethaddr);
+}
+
+#if defined(CONFIG_PCI)
+static struct pci_controller hose;
+
+extern void pci_mpc5xxx_init(struct pci_controller *);
+
+void pci_init_board(void)
+{
+ pci_mpc5xxx_init(&hose);
+}
+
+#endif /* defined(CONFIG_PCI) */
+
+#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+void init_ide_reset(void)
+{
+ debug("init_ide_reset\n");
+
+ /* assert reset */
+ *(vu_long *) (CFG_FPGA_BASE + 0x480) &= ~0x08000000UL;
+
+ /* disable level shifters and enable level shifter power supply */
+ *(vu_long *) (CFG_FPGA_BASE + 0x480) |= 0x06000000UL;
+
+ /* enable level shifters */
+ *(vu_long *) (CFG_FPGA_BASE + 0x480) &= ~0x04000000UL;
+}
+
+void ide_set_reset(int idereset)
+{
+ debug("ide_reset(%d)\n", idereset);
+
+ if (idereset) {
+ *(vu_long *) (CFG_FPGA_BASE + 0x480) &= ~0x08000000UL;
+ } else {
+ *(vu_long *) (CFG_FPGA_BASE + 0x480) |= 0x08000000UL;
+ }
+}
+#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+
+#ifdef CONFIG_CONSOLE_EXTRA_INFO
+/* Return text to be printed besides the logo. */
+void video_get_info_str(int line_number, char *info)
+{
+ if (line_number == 1) {
+ strcpy(info, " Media5200");
+ } else {
+ info[0] = '\0';
+ }
+}
+#endif
+
+int misc_init_r(void)
+{
+ /* Enable audio paths in the Media5200 FPGA */
+ *(vu_long *) (CFG_FPGA_BASE + 0x490) = 0UL;
+}
diff --git a/board/media5200/mt46v32m16tg-75.h b/board/media5200/mt46v32m16tg-75.h
new file mode 100644
index 0000000..cef0b86
--- /dev/null
+++ b/board/media5200/mt46v32m16tg-75.h
@@ -0,0 +1,37 @@
+/*
+ * (C) Copyright 2004
+ * Mark Jonas, Freescale Semiconductor, mark.jonas at motorola.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#define SDRAM_DDR 1 /* is DDR */
+
+#if defined(CONFIG_MPC5200)
+/* Settings for XLB = 132 MHz */
+#define SDRAM_MODE 0x018D0000
+#define SDRAM_EMODE 0x40090000
+#define SDRAM_CONTROL 0x714f0f00
+#define SDRAM_CONFIG1 0x73722930
+#define SDRAM_CONFIG2 0x57770000
+#define SDRAM_TAPDELAY 0x0F000000
+
+#else
+#error CONFIG_MPC5200 not defined
+#endif
diff --git a/board/media5200/sdram.c b/board/media5200/sdram.c
new file mode 100644
index 0000000..d6f3bd6
--- /dev/null
+++ b/board/media5200/sdram.c
@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2003-2004
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * (C) Copyright 2004
+ * Mark Jonas, Freescale Semiconductor, mark.jonas at freescale.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc5xxx.h>
+
+#include "sdram.h"
+
+#ifndef CFG_RAMBOOT
+static void mpc5xxx_sdram_start(sdram_conf_t * sdram_conf, int hi_addr)
+{
+ long hi_addr_bit = hi_addr ? 0x01000000 : 0;
+
+ /* unlock mode register */
+ *(vu_long *) MPC5XXX_SDRAM_CTRL =
+ sdram_conf->control | 0x80000000 | hi_addr_bit;
+ __asm__ volatile ("sync");
+
+ /* precharge all banks */
+ *(vu_long *) MPC5XXX_SDRAM_CTRL =
+ sdram_conf->control | 0x80000002 | hi_addr_bit;
+ __asm__ volatile ("sync");
+
+ if (sdram_conf->ddr) {
+ /* set mode register: extended mode */
+ *(vu_long *) MPC5XXX_SDRAM_MODE = sdram_conf->emode;
+ __asm__ volatile ("sync");
+
+ /* set mode register: reset DLL */
+ *(vu_long *) MPC5XXX_SDRAM_MODE = sdram_conf->mode | 0x04000000;
+ __asm__ volatile ("sync");
+ }
+
+ /* precharge all banks */
+ *(vu_long *) MPC5XXX_SDRAM_CTRL =
+ sdram_conf->control | 0x80000002 | hi_addr_bit;
+ __asm__ volatile ("sync");
+
+ /* auto refresh */
+ *(vu_long *) MPC5XXX_SDRAM_CTRL =
+ sdram_conf->control | 0x80000004 | hi_addr_bit;
+ __asm__ volatile ("sync");
+
+ /* set mode register */
+ *(vu_long *) MPC5XXX_SDRAM_MODE = sdram_conf->mode;
+ __asm__ volatile ("sync");
+
+ /* normal operation */
+ *(vu_long *) MPC5XXX_SDRAM_CTRL = sdram_conf->control | hi_addr_bit;
+ __asm__ volatile ("sync");
+}
+#endif
+
+/*
+ * ATTENTION: Although partially referenced initdram does NOT make real use
+ * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
+ * is something else than 0x00000000.
+ */
+
+#if defined(CONFIG_MPC5200)
+long int mpc5xxx_sdram_init(sdram_conf_t * sdram_conf)
+{
+ ulong dramsize = 0;
+ ulong dramsize2 = 0;
+#ifndef CFG_RAMBOOT
+
+ /* setup SDRAM chip selects */
+ if (CFG_SDRAM_SIZE_CS0 > 0) {
+ *(vu_long *) MPC5XXX_SDRAM_CS0CFG =
+ 0x13 + __builtin_ffs(CFG_SDRAM_SIZE_CS0 >> 20) - 1;
+ } else {
+ *(vu_long *) MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
+ }
+ if (CFG_SDRAM_SIZE_CS1 > 0) {
+ *(vu_long *) MPC5XXX_SDRAM_CS1CFG = CFG_SDRAM_SIZE_CS0
+ | (0x13 + __builtin_ffs(dramsize2 >> 20) - 1);
+ } else {
+ *(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
+ }
+ __asm__ volatile ("sync");
+
+ /* setup config registers */
+ *(vu_long *) MPC5XXX_SDRAM_CONFIG1 = sdram_conf->config1;
+ *(vu_long *) MPC5XXX_SDRAM_CONFIG2 = sdram_conf->config2;
+ __asm__ volatile ("sync");
+
+ if (sdram_conf->ddr) {
+ /* set tap delay */
+ *(vu_long *) MPC5XXX_CDM_PORCFG = sdram_conf->tapdelay;
+ __asm__ volatile ("sync");
+ }
+
+ mpc5xxx_sdram_start(sdram_conf, CFG_SDRAM_HI_ADDR);
+
+ return CFG_SDRAM_SIZE_CS0 + CFG_SDRAM_SIZE_CS1;
+
+#else /* CFG_RAMBOOT */
+
+ /* retrieve size of memory connected to SDRAM CS0 */
+ dramsize = *(vu_long *) MPC5XXX_SDRAM_CS0CFG & 0xFF;
+ if (dramsize >= 0x13) {
+ dramsize = (1 << (dramsize - 0x13)) << 20;
+ } else {
+ dramsize = 0;
+ }
+
+ /* retrieve size of memory connected to SDRAM CS1 */
+ dramsize2 = *(vu_long *) MPC5XXX_SDRAM_CS1CFG & 0xFF;
+ if (dramsize2 >= 0x13) {
+ dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
+ } else {
+ dramsize2 = 0;
+ }
+
+ return dramsize + dramsize2;
+#endif /* CFG_RAMBOOT */
+}
+
+#else
+#error CONFIG_MPC5200 not defined
+#endif
diff --git a/board/media5200/sdram.h b/board/media5200/sdram.h
new file mode 100644
index 0000000..26f1e93
--- /dev/null
+++ b/board/media5200/sdram.h
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2004
+ * Mark Jonas, Freescale Semiconductor, mark.jonas at freescale.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+typedef struct {
+ ulong ddr;
+ ulong mode;
+ ulong emode;
+ ulong control;
+ ulong config1;
+ ulong config2;
+ ulong tapdelay;
+} sdram_conf_t;
+
+long int mpc5xxx_sdram_init(sdram_conf_t * sdram_conf);
diff --git a/board/media5200/u-boot.lds b/board/media5200/u-boot.lds
new file mode 100644
index 0000000..f848289
--- /dev/null
+++ b/board/media5200/u-boot.lds
@@ -0,0 +1,121 @@
+/*
+ * (C) Copyright 2003-2004
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ cpu/mpc5xxx/start.o (.text)
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ . = ALIGN(16);
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x0FFF) & 0xFFFFF000;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+ __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(4096);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(4096);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/cpu/mpc5xxx/fec.c b/cpu/mpc5xxx/fec.c
index e639234..28a000b 100644
--- a/cpu/mpc5xxx/fec.c
+++ b/cpu/mpc5xxx/fec.c
@@ -883,7 +883,8 @@ int mpc5xxx_fec_initialize(bd_t * bis)
defined(CONFIG_MCC200) || defined(CONFIG_MOTIONPRO) || \
defined(CONFIG_O2DNT) || defined(CONFIG_PM520) || \
defined(CONFIG_TOP5200) || defined(CONFIG_TQM5200) || \
- defined(CONFIG_UC101) || defined(CONFIG_V38B)
+ defined(CONFIG_UC101) || defined(CONFIG_V38B) || \
+ defined(CONFIG_MEDIA5200)
# ifndef CONFIG_FEC_10MBIT
fec->xcv_type = MII100;
# else
diff --git a/include/configs/Media5200.h b/include/configs/Media5200.h
new file mode 100644
index 0000000..66e7457
--- /dev/null
+++ b/include/configs/Media5200.h
@@ -0,0 +1,354 @@
+/*
+ * (C) Copyright 2003-2004
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * (C) Copyright 2004-2005
+ * Mark Jonas, Freescale Semiconductor, mark.jonas at freescale.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+
+#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
+#define CONFIG_MPC5200 1 /* ... MPC5200 to be exact */
+#define CONFIG_MEDIA5200 1 /* ... on Media5200 board */
+
+#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE 6 /* console is on PSC6 */
+#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
+
+/*
+ * PCI Mapping:
+ * 0x40000000 - 0x4fffffff - PCI Memory
+ * 0x50000000 - 0x50ffffff - PCI IO Space
+ */
+#define CONFIG_PCI 1
+#define CONFIG_PCI_PNP 1
+#define CONFIG_PCI_SCAN_SHOW 1
+
+#define CONFIG_PCI_MEM_BUS 0x40000000
+#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
+#define CONFIG_PCI_MEM_SIZE 0x10000000
+
+#define CONFIG_PCI_IO_BUS 0x50000000
+#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
+#define CONFIG_PCI_IO_SIZE 0x01000000
+
+#define CONFIG_NET_MULTI 1 /* support more than one network adapter */
+#define CONFIG_MII 1
+/* Intel PRO/100 PCI network card support */
+#define CONFIG_EEPRO100 1
+#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
+/* NatSemi DP8382x PCI network card support */
+#define CONFIG_NS8382X 1
+/* The RTL8139 driver detects the card but does not work.
+ * Additionally, the driver could need some cleanup that on non-MIPS platforms
+ * the KSEG1ADDR macro and on all platforms the _IO_BASE define are not needed.
+#define CONFIG_RTL8139 1
+#define _IO_BASE 0x50000000
+#define KSEG1ADDR(a) (a)
+*/
+
+#define ADD_PCI_CMD CFG_CMD_PCI
+
+/* Partitions */
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+
+/* USB */
+#if 1
+#define CONFIG_USB_OHCI
+#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
+#define CONFIG_USB_STORAGE
+#else
+#define ADD_USB_CMD 0
+#endif
+
+#if 1
+#define CFG_XLB_PIPELINING 1
+#define CFG_PCI_SNOOPING 1
+#define CONFIG_PHY_LATECHECK 1
+
+#endif
+
+/*
+ * Supported commands
+ */
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
+ CFG_CMD_PING | \
+ CFG_CMD_I2C | \
+ CFG_CMD_EEPROM | \
+ CFG_CMD_FAT | \
+ CFG_CMD_IDE | \
+ ADD_PCI_CMD | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_REGINFO| \
+ ADD_USB_CMD)
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#if (TEXT_BASE == 0xFE000000) /* Boot low */
+# define CFG_LOWBOOT 1
+#endif
+
+/*
+ * Autobooting
+ */
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+
+#define CONFIG_PREBOOT \
+ "usb reset; setenv stdout serial;" \
+ "setenv stderr serial;echo;" \
+ "echo 'Autostarting. Press any key to abort...';echo"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "autoload=no\0" \
+ "autostart=no\0" \
+ "script_addr=0x200000\0" \
+ "install_usb=setenv script bootrc.img;run script_usb\0" \
+ "script_usb=run usbstart;" \
+ "fatload usb 0:${usbpart} ${script_addr} ${script};" \
+ "autoscr ${script_addr}\0" \
+ "usbstart=usb reset; usb storage\0" \
+ "usbpart=1\0" \
+ "reset_env=erase 0xfff80000 0xfffbffff\0" \
+ ""
+
+#define CONFIG_BOOTCOMMAND "run install_usb"
+
+/*
+ * IPB Bus clocking configuration.
+ */
+#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#define CFG_I2C_MODULE 2 /* Select I2C module #1 or #2 */
+
+#define CFG_I2C_SPEED 100000 /* 100 kHz */
+#define CFG_I2C_SLAVE 0x7F
+
+/*
+ * EEPROM configuration
+ */
+#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
+#define CFG_I2C_EEPROM_ADDR_LEN 1
+#define CFG_EEPROM_PAGE_WRITE_BITS 3
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 70
+#define CFG_EEPROM_PRODUCT_INFO_OFFSET 0x00 /* counting from the beginning of the eeprom */
+#define CFG_EEPROM_MACADDR_OFFSET 0x10 /* counting from the beginning of the eeprom */
+
+/*
+ * Flash configuration
+ */
+#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
+#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
+#define CFG_MAX_FLASH_BANKS 2 /* max num of flash banks */
+#define CFG_FLASH_BANKS_LIST { CFG_CS1_START, CFG_BOOTCS_START }
+#define CFG_FLASH_EMPTY_INFO
+#define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */
+
+#define CFG_FLASH_BASE 0xFC000000
+
+/* allow 4 128K sectors for u-boot before ENV starts */
+#if defined(CFG_LOWBOOT)
+# define CFG_ENV_ADDR 0xFE080000
+#else /* CFG_LOWBOOT */
+# define CFG_ENV_ADDR 0xFFF80000
+#endif /* CFG_LOWBOOT */
+
+/*
+ * Environment settings
+ */
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_SIZE 0x40000
+#define CFG_ENV_SECT_SIZE 0x40000
+#define CONFIG_ENV_OVERWRITE 1
+
+/*
+ * Memory map
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_SIZE_CS0 0x08000000 /* 128 MB */
+#define CFG_SDRAM_SIZE_CS1 0x00000000 /* 0 MB */
+#define CFG_SDRAM_HI_ADDR 1
+#define CFG_DEFAULT_MBAR 0x80000000
+#define CFG_MBAR 0xF0000000 /* 64 kB */
+#define CFG_FPGA_BASE 0xF0010000 /* 64 kB */
+#define CFG_DUART_BASE 0xF0020000 /* 64 kB */
+
+/* Use SRAM until RAM will be available */
+#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
+#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */
+
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
+# define CFG_RAMBOOT 1
+#endif
+
+#define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
+#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC5xxx_FEC 1
+#define CONFIG_FEC_MII100 1
+#define CONFIG_PHY_ADDR 0x00
+
+/*
+ * GPIO configuration
+ *
+ * CS1: SDRAM CS1 disabled, gpio_wkup_6 enabled 0
+ * Reserved 0
+ * ALTs: CAN1 on I2C1, CAN2 on Tmr0/1 01
+ * CS7: Interrupt GPIO on PSC3_5 0
+ * CS8: Interrupt GPIO on PSC3_4 0
+ * ATA: reset default, changed in ATA driver 00
+ * IR_USB_CLK: IrDA/USB 48MHz clock gen. int., pin is GPIO 0
+ * IRDA: UART (PSC6) / IrDA 101
+ * ETHER: reset default, changed in Ethernet driver 0000
+ * PCI_DIS: reset default, changed in PCI driver 0
+ * USB_SE: reset default, changed in USB driver 0
+ * USB: reset default, changed in USB driver 00
+ * PSC3: SPI and UART functionality without CD 1100
+ * Reserved 0
+ * PSC2: reset default, changed in AC'97 driver 000
+ * Reserved 0
+ * PSC1: reset default, changed in I2S driver 000
+ *
+ */
+#define CFG_GPS_PORT_CONFIG 0x10500C00
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
+#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+/*
+ * Various low-level settings
+ */
+#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
+#define CFG_HID0_FINAL HID0_ICE
+
+#define CFG_BOOTCS_START (CFG_CS1_START + CFG_CS1_SIZE)
+#define CFG_BOOTCS_SIZE 0x02000000 /* 32 MB */
+#define CFG_BOOTCS_CFG 0x0008DF00 /* 8WS, MX, AL, CE, AS_25, DS_32 */
+#define CFG_CS1_START CFG_FLASH_BASE
+#define CFG_CS1_SIZE 0x02000000 /* 32 MB */
+#define CFG_CS1_CFG 0x0008DF00 /* 8WS, MX, AL, CE, AS_25, DS_32 */
+
+#define CFG_CS2_START CFG_FPGA_BASE
+#define CFG_CS2_SIZE 0x00010000 /* 64 kB */
+#define CFG_CS2_CFG 0x0006FF00 /* 6WS, MX, AL, AA, CE, AS_25, DS_32 */
+
+#define CFG_CS3_START CFG_DUART_BASE
+#define CFG_CS3_SIZE 0x00010000 /* 64 kB */
+#define CFG_CS3_CFG 0x00085800 /* 8WS, CE, AS_24, DS_8 */
+
+#define CFG_CS_BURST 0x00000000
+#define CFG_CS_DEADCYCLE 0x33333333
+
+/*-----------------------------------------------------------------------
+ * USB stuff
+ *-----------------------------------------------------------------------
+ */
+#define CONFIG_USB_CLOCK 0x0001BBBB
+#define CONFIG_USB_CONFIG 0x00001000
+
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff Supports IDE harddisk
+ *-----------------------------------------------------------------------
+ */
+
+#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
+
+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+
+#define CONFIG_IDE_RESET /* reset for ide supported */
+#define CONFIG_IDE_PREINIT
+
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
+
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_BASE_ADDR MPC5XXX_ATA
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET (0x0060)
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET (0x005C)
+
+/* Interval between registers */
+#define CFG_ATA_STRIDE 4
+
+#endif /* __CONFIG_H */
--
1.5.0
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