[U-Boot-Users] CFI flash driver problem

[Jeff Mann]

>  
> I have debugged the error, and when stepping through code in "human 
> time," I do not get this exeption. So, I put in in some basic 
> debugging printouts and I can see that the problem occuring some place

> in the
> flash_write_cmd() function when calling it with "flash_write_cmd 
> (info, sect, 0, AMD_CMD_ERASE_SECTOR);" at around line 490 in
flash_erase().
>   

UPDATE:

I am proving this update in case someone searches the list archives to
solve a similar problem. 

The problem was the result of both NOR Flash and Cellular RAM driving
the EBC_READY signal (also called CRAM_WT, and WAIT in the CRAM
documents). Because of this configuration, after doing an operation on
the Flash that requires a delay, such as erase or write, the Flash held
EBC_READY low for a long time while erading or writing. So the processor
never saw the CRAM release CRAM_WT when its data was ready. The
processor never could retrieve the next instruction and intrepreted this
as an "illegal instruction."

The problem had nothing to do with bus transievers or accessing timing. 

In "human time" the erase cycle completed before I made the next step in
code. 

-Jeffrey Mann