[U-Boot-Users] BRGs on ep8248 after updating CLKIN

[Alan Bennett]

Yes.  Thank you

On 11/30/07, Laurent Pinchart <laurentp at cse-semaphore.com> wrote:
> On Thursday 29 November 2007 23:39, Alan Bennett wrote:
> > Ok, I don't know what I was thinking.  Yes, it's 66 MHz.
> >
> > The only thing I can see is in the calculation for BUS_CLK
> >       speed.c   =   gd->bus_clk = clkin;
> >
> > However, looking at the Ref Manual for the 8272, Figure 10-1,
> >    It shows a conflict:
> >         1. MAIN_PLL = 66MHz * (SCMR[pllmf]+1) = 66MHz*(5+1) = 396 MHz
> >         2. BUSCLK = MAIN_PLL/(SCMR[busdf]+1) = 396MHz /(3+1) = 99 MHz
> >         and then
> >         BUS_CLK = SCMR[corecnf] multiplier 1E=3.5*BUS_CLK
> >
> > BUT CLKIN != BUS_CLK  (66MHz != 99MHz)
> >
> > So could it be
> >               gd->cpu_clk = (gd->bus_clk * cp->b2c_mult) / 2;
> > instead of
> >               gd->cpu_clk = (clkin * cp->b2c_mult) / 2;
> >
> > -Alan
> >
> > On 11/29/07, Jerry Van Baren <gerald.vanbaren at ge.com> wrote:
> > > Alan Bennett wrote:
> > > > When I originally supported my ep8248-style board, I had
> > > > #define CONFIG_8260_CLKIN     66000000        /* in Hz */
>
> If I'm not mistaken, your 66 MHz oscillator runs at 200/3 MHz, so
> CONFIG_8260_CLKIN should be set to 66666666.
>
> > > > However, I noticed (after far too much time had passed) that my cpu
> > > > speed wasn't matching my expectations.  (reported 230 MHz, and
> > > > expected 350 MHz).
> > > >
> > > > This was rather easily fixed by changing the CONFIG_8260_CLKIN to 100
> > > > MHz: #define CONFIG_8260_CLKIN     100000000       /* in Hz */
> > > >
> > > > However, my BRGs / SMC1 uart is now broke(baud-rate mismatch).  Does
> > > > anyone have experience with this section of u-boot that could help me
> > > > out?
> > > >
> > > > My BRG7 is configured by u-boot(1.3+) = 0x00010078 ~ CD = 60 (0x3c).
> > > > And there is an apparent baud-rate mismatch and all the output is
> > > > garbled now.  (with a scope I measured ~ 25.5 / 26 K, when I'm
> > > > expecting 38.4k)
> > > >
> > > > I think I'm missing something in the equation, but I'm not sure where
> > > > it is.  If I simply update the CD to be 162 (162*38400*16 = 99,532,800
> > > > ~ 100 MHz) the serial port is still dead.
> > > >
> > > > Any ideas?
> > >
> > > Hi Alan,
> > >
> > > I suspect that your clock is really 66MHz (read it off the crystal, that
> > > is the definitive authority).  Generally BRGs don't lie - if your
> > > CONFIG_8260_CLKIN doesn't match the actual crystal, your baud rate is
> > > going to be wrong.  Your baud rate is right when CONFIG_8260_CLKIN is
> > > set to 66MHz and wrong when set to 100MHz - pretty strong evidence.
> > >
> > > My theory is that your crystal is 66MHz but your CPU multiplier is
> > > misconfigured.  In the 8260 the CPU multiplier is selected by the HRCW
> > > (MODCK_H) _and_ some physical pins on the CPU (MODCK[1-3]) - your 8248
> > > may be different.
>
> Best regards,
>
> --
> Laurent Pinchart
> CSE Semaphore Belgium
>
> Chaussée de Bruxelles, 732A
> B-1410 Waterloo
> Belgium
>
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>
>