[U-Boot-Users] PXA GPIOs settings on resume

[Rodolfo Giometti]

Hello,

looking at CPU init during resume I noticed that the GPIOs settings is
always executed (see for instance the first lines of file
board/adsvix/lowlevel_init.S), but since PXA27x Developer's manual
says at paragraph 3.8.1.9 that:

   "These registers [PGSRx] are reset upon sleep or deep-sleep exit,
   so the configuration of the GPIO pins must be read from external
   memory. However, the GPIO state itself is not changed until
   software resets PSSR[PH].

we should setup, during resume, the GPIOs from Linux (or whatever OS
we are using).

So the code:

lowlevel_init:

        /* Set up GPIO pins first ----------------------------------------- */

        ldr             r0,     =GPSR0
        ldr             r1,     =CFG_GPSR0_VAL
        str             r1,   [r0]

        ldr             r0,     =GPSR1
        ldr             r1,     =CFG_GPSR1_VAL
        str             r1,   [r0]

        ldr             r0,     =GPSR2
        ldr             r1,     =CFG_GPSR2_VAL
        str             r1,   [r0]

        ldr             r0,     =GPSR3
        ldr             r1,     =CFG_GPSR3_VAL
        str             r1,   [r0]

        ldr             r0,     =GPCR0
        ldr             r1,     =CFG_GPCR0_VAL
        str             r1,   [r0]

        ldr             r0,     =GPCR1
        ldr             r1,     =CFG_GPCR1_VAL
        str             r1,   [r0]

        ldr             r0,     =GPCR2
        ldr             r1,     =CFG_GPCR2_VAL
        str             r1,   [r0]

        ldr             r0,     =GPCR3
        ldr             r1,     =CFG_GPCR3_VAL
        str             r1,   [r0]

        ldr             r0,     =GPDR0
        ldr             r1,     =CFG_GPDR0_VAL
        str             r1,   [r0]

        ldr             r0,     =GPDR1
        ldr             r1,     =CFG_GPDR1_VAL
        str             r1,   [r0]

        ldr             r0,     =GPDR2
        ldr             r1,     =CFG_GPDR2_VAL
        str             r1,   [r0]

        ldr             r0,     =GPDR3
        ldr             r1,     =CFG_GPDR3_VAL
        str             r1,   [r0]

        ldr             r0,     =GAFR0_L
        ldr             r1,     =CFG_GAFR0_L_VAL
        str             r1,   [r0]

        ldr             r0,     =GAFR0_U
        ldr             r1,     =CFG_GAFR0_U_VAL
        str             r1,   [r0]

        ldr             r0,     =GAFR1_L
        ldr             r1,     =CFG_GAFR1_L_VAL
        str             r1,   [r0]

        ldr             r0,     =GAFR1_U
        ldr             r1,     =CFG_GAFR1_U_VAL
        str             r1,   [r0]

        ldr             r0,     =GAFR2_L
        ldr             r1,     =CFG_GAFR2_L_VAL
        str             r1,   [r0]

        ldr             r0,     =GAFR2_U
        ldr             r1,     =CFG_GAFR2_U_VAL
        str             r1,   [r0]

        ldr             r0,     =GAFR3_L
        ldr             r1,     =CFG_GAFR3_L_VAL
        str             r1,   [r0]

        ldr             r0,     =GAFR3_U
        ldr             r1,     =CFG_GAFR3_U_VAL
        str             r1,   [r0]

        ldr             r0,     =PSSR           /* enable GPIO pins */
        ldr             r1,     =CFG_PSSR_VAL
        str             r1,   [r0]

should be remove from per-board lowlevel_init.S and put into
cpu/pxa/start.S after the lowlevel_init alling:

        /*
         * before relocating, we have to setup RAM timing
         * because memory timing is board-dependend, you will
         * find a lowlevel_init.S in your board directory.
         */
        mov     ip,     lr
        bl      lowlevel_init
        mov     lr,     ip

	<<HERE>>

or, at least, after the test:

wakeup:
        /* Are we waking from sleep? */
        ldr     r0,     =RCSR
        ldr     r1,     [r0]
        and     r1,     r1, #(RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR)
        str     r1,     [r0]
        teq     r1,     #RCSR_SMR

in lowlevel_init.S.

Then the OS should manage the GPIOs resume at their old status before
sleeping. In this manner we can get fully configurable GPIOs status
setting during transition from suspend to resume.

Comments? :)

Ciao,

Rodolfo

P.S. Of course, if my supposition is correct I'll provide GPIOs resume
in Linux too.

--

GNU/Linux Solutions                  e-mail:    giometti at enneenne.com
Linux Device Driver                             giometti at gnudd.com
Embedded Systems                     		giometti at linux.it
UNIX programming                     phone:     +39 349 2432127