[U-Boot-Users] [PATCH8] microblaze - emaclite support
Grant Likely
grant.likely at secretlab.ca
Tue Sep 11 17:32:07 CEST 2007
On 8/30/07, Michal Simek <Monstr at seznam.cz> wrote:
> DESC: Add support for Xilinx emaclite
>
> Signed-off-by: Michal Simek <monstr at monstr.eu>
Good looking driver. See comments below.
Cheers,
g.
>
> diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
> index e69de29..5d8eaa5 100644
> --- a/drivers/net/xilinx_emaclite.c
> +++ b/drivers/net/xilinx_emaclite.c
> @@ -0,0 +1,376 @@
> +
> +#include <common.h>
> +#include <net.h>
> +#include <config.h>
> +#include <asm/io.h>
> +
> +#ifdef XILINX_EMACLITE_BASEADDR
Need a CONFIG_ prefix.
> +
> +#undef DEBUG
> +
> +#define ENET_MAX_MTU PKTSIZE
> +#define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN
> +#define ENET_ADDR_LENGTH 6
> +
> +/* EmacLite constants */
> +#define XEL_BUFFER_OFFSET 0x0800 /* Next buffer's offset */
> +#define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */
> +#define XEL_TSR_OFFSET 0x07FC /* Tx status */
> +#define XEL_RSR_OFFSET 0x17FC /* Rx status */
> +#define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */
> +
> +/* Xmit complete */
> +#define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL
> +/* Xmit interrupt enable bit */
> +#define XEL_TSR_XMIT_IE_MASK 0x00000008UL
> +/* Buffer is active, SW bit only */
> +#define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000UL
> +/* Program the MAC address */
> +#define XEL_TSR_PROGRAM_MASK 0x00000002UL
> +/* define for programming the MAC address into the EMAC Lite */
> +#define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
> +
> +/* Transmit packet length upper byte */
> +#define XEL_TPLR_LENGTH_MASK_HI 0x0000FF00UL
> +/* Transmit packet length lower byte */
> +#define XEL_TPLR_LENGTH_MASK_LO 0x000000FFUL
> +
> +/* Recv complete */
> +#define XEL_RSR_RECV_DONE_MASK 0x00000001UL
> +/* Recv interrupt enable bit */
> +#define XEL_RSR_RECV_IE_MASK 0x00000008UL
> +
> +typedef struct {
> + unsigned int baseaddress; /* Base address for device (IPIF) */
> + unsigned int nexttxbuffertouse; /* Next TX buffer to write to */
> + unsigned int nextrxbuffertouse; /* Next RX buffer to read from */
> + unsigned char deviceid; /* Unique ID of device - for future */
> +} xemaclite;
> +
> +static xemaclite emaclite;
> +
> +static char etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */
> +
> +/* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/
> +#ifdef CFG_ENV_IS_NOWHERE
> +static u8 emacaddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 };
> +#endif
> +
> +void xemaclite_alignedread (u32 * srcptr, void *destptr, unsigned bytecount)
> +{
> + unsigned int i;
> + u32 alignbuffer;
> + u32 *to32ptr;
> + u32 *from32ptr;
> + u8 *to8ptr;
> + u8 *from8ptr;
> +
> + from32ptr = (u32 *) srcptr;
> +
> + /* Word aligned buffer, no correction needed. */
> + to32ptr = (u32 *) destptr;
> + while (bytecount > 3) {
> + *to32ptr++ = *from32ptr++;
> + bytecount -= 4;
> + }
> + to8ptr = (u8 *) to32ptr;
> +
> + alignbuffer = *from32ptr++;
> + from8ptr = (u8 *) & alignbuffer;
> +
> + for (i = 0; i < bytecount; i++) {
> + *to8ptr++ = *from8ptr++;
> + }
> +}
> +
> +void xemaclite_alignedwrite (void *srcptr, u32 destptr, unsigned bytecount)
> +{
> + unsigned i;
> + u32 alignbuffer;
> + u32 *to32ptr = (u32 *) destptr;
> + u32 *from32ptr;
> + u8 *to8ptr;
> + u8 *from8ptr;
> +
> + from32ptr = (u32 *) srcptr;
> + while (bytecount > 3) {
> +
> + *to32ptr++ = *from32ptr++;
> + bytecount -= 4;
> + }
> +
> + alignbuffer = 0;
> + to8ptr = (u8 *) & alignbuffer;
> + from8ptr = (u8 *) from32ptr;
> +
> + for (i = 0; i < bytecount; i++) {
> + *to8ptr++ = *from8ptr++;
> + }
> +
> + *to32ptr++ = alignbuffer;
> +}
I'm curious: why alignedread/write? Is this to IO space? Why not
simply memcpy()?
> +
> +void eth_halt (void)
> +{
> +#ifdef DEBUG
> + puts ("eth_halt\n");
> +#endif
You should use the debug() macro here (defined in common.h) Just move
your '#undef DEBUG' so that it is above the '#include <common.h>'
line.
> +}
> +
> +int eth_init (bd_t * bis)
> +{
> +#ifdef DEBUG
> + puts ("EmacLite Initialization Started\n");
> +#endif
Ditto
> + memset (&emaclite, 0, sizeof (xemaclite));
> + emaclite.baseaddress = XILINX_EMACLITE_BASEADDR;
> +
> + if (!getenv("ethaddr")) {
> + memcpy(bis->bi_enetaddr, emacaddr, ENET_ADDR_LENGTH);
> + }
> +
> +/*
> + * TX - TX_PING & TX_PONG initialization
> + */
> + /* Restart PING TX */
> + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0);
> + /* Copy MAC address */
> + xemaclite_alignedwrite (bis->bi_enetaddr,
> + emaclite.baseaddress, ENET_ADDR_LENGTH);
> + /* Set the length */
> + out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
> + /* Update the MAC address in the EMAC Lite */
> + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR);+ /* Wait for EMAC Lite to finish with the MAC address update */
> + while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET) &
> + XEL_TSR_PROG_MAC_ADDR) != 0) ;
> +
> +#ifdef XILINX_EMACLITE_TX_PING_PONG
CONFIG_ prefix
> + /* The same operation with PONG TX */
> + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0);+ xemaclite_alignedwrite (bis->bi_enetaddr, emaclite.baseaddress +
> + XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH);
> + out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
> + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET,
> + XEL_TSR_PROG_MAC_ADDR);
> + while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET +
> + XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0) ;
> +#endif
> +
> +/*
> + * RX - RX_PING & RX_PONG initialization
> + */
> + /* Write out the value to flush the RX buffer */
> + out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK);
> +#ifdef XILINX_EMACLITE_RX_PING_PONG
CONFIG_
> + out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET,
> + XEL_RSR_RECV_IE_MASK);
> +#endif
> +
> +#ifdef DEBUG
> + puts ("EmacLite Initialization complete\n");
> +#endif
> + return 0;
> +}
> +
> +int xemaclite_txbufferavailable (xemaclite * instanceptr)
> +{
> + u32 reg;
> + u32 txpingbusy;
> + u32 txpongbusy;
> + /*
> + * Read the other buffer register
> + * and determine if the other buffer is available
> + */
> + reg = in_be32 (instanceptr->baseaddress +
> + instanceptr->nexttxbuffertouse + 0);
> + txpingbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) ==
> + XEL_TSR_XMIT_BUSY_MASK);
> +
> + reg = in_be32 (instanceptr->baseaddress +
> + (instanceptr->nexttxbuffertouse ^ XEL_TSR_OFFSET) + 0);
> + txpongbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) ==
> + XEL_TSR_XMIT_BUSY_MASK);
> +
> + return (!(txpingbusy && txpongbusy));
> +}
> +
> +int eth_send (volatile void *ptr, int len) {
> +
> + unsigned int reg;
> + unsigned int baseaddress;
> +
> + unsigned maxtry = 1000;
> +
> + if (len > ENET_MAX_MTU)
> + len = ENET_MAX_MTU;
> +
> + while (!xemaclite_txbufferavailable (&emaclite) && maxtry) {
> + udelay (10);
Is the delay needed? Is there any reason not to poll at full speed?
> + maxtry--;
> + }
> +
> + if (!maxtry) {
> + printf ("Error: Timeout waiting for ethernet TX buffer\n");
> + /* Restart PING TX */
> + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0);
> +#ifdef XILINX_EMACLITE_TX_PING_PONG
> + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET +
> + XEL_BUFFER_OFFSET, 0);
> +#endif
> + return 0;
> + }
> +
> + /* Determine the expected TX buffer address */
> + baseaddress = (emaclite.baseaddress + emaclite.nexttxbuffertouse);
> +
> + /* Determine if the expected buffer address is empty */
> + reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
> + if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0)
> + && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET)
> + & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {
> +
> +#ifdef XILINX_EMACLITE_TX_PING_PONG
> + emaclite.nexttxbuffertouse ^= XEL_BUFFER_OFFSET;
> +#endif
CONFIG_
> +#ifdef DEBUG
> + printf ("Send packet from 0x%x\n", baseaddress);
> +#endif
debug()
> + /* Write the frame to the buffer */
> + xemaclite_alignedwrite ((void *) ptr, baseaddress, len);
> + out_be32 (baseaddress + XEL_TPLR_OFFSET,(len &
> + (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO)));
> + reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
> + reg |= XEL_TSR_XMIT_BUSY_MASK;
> + if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) {
> + reg |= XEL_TSR_XMIT_ACTIVE_MASK;
> + }
> + out_be32 (baseaddress + XEL_TSR_OFFSET, reg);
> + return 1;
> + }
> +#ifdef XILINX_EMACLITE_TX_PING_PONG
> + /* Switch to second buffer */
> + baseaddress ^= XEL_BUFFER_OFFSET;
> + /* Determine if the expected buffer address is empty */
> + reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
> + if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0)
> + && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET)
> + & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {
> +#ifdef DEBUG
> + printf ("Send packet from 0x%x\n", baseaddress);
> +#endif
> + /* Write the frame to the buffer */
> + xemaclite_alignedwrite ((void *) ptr, baseaddress, len);
> + out_be32 (baseaddress + XEL_TPLR_OFFSET,(len &
> + (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO)));
> + reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
> + reg |= XEL_TSR_XMIT_BUSY_MASK;
> + if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) {
> + reg |= XEL_TSR_XMIT_ACTIVE_MASK;
> + }
> + out_be32 (baseaddress + XEL_TSR_OFFSET, reg);
> + return 1;
> + }
> +#endif
> + puts ("Error while sending frame\n");
> + return 0;
> +}
> +
> +int eth_rx (void)
> +{
> + unsigned int length;
> + unsigned int reg;
> + unsigned int baseaddress;
> +
> + baseaddress = emaclite.baseaddress + emaclite.nextrxbuffertouse;
> + reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
> +#ifdef DEBUG
> + printf ("Testing data at address 0x%x\n", baseaddress);
> +#endif
> + if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
> +#ifdef XILINX_EMACLITE_RX_PING_PONG
> + emaclite.nextrxbuffertouse ^= XEL_BUFFER_OFFSET;
> +#endif
> + } else {
> +#ifndef XILINX_EMACLITE_RX_PING_PONG
> +#ifdef DEBUG
> + printf ("No data was available - address 0x%x\n", baseaddress);
> +#endif
> + return 0;
> +#else
> + baseaddress ^= XEL_BUFFER_OFFSET;
> + reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
> + if ((reg & XEL_RSR_RECV_DONE_MASK) !=
> + XEL_RSR_RECV_DONE_MASK) {
> +#ifdef DEBUG
> + printf ("No data was available - address 0x%x\n",
> + baseaddress);
> +#endif
> + return 0;
> + }
> +#endif
> + }
> + /* Get the length of the frame that arrived */
> + switch(((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC)) &
> + 0xFFFF0000 ) >> 16) {
> + case 0x806:
> + length = 42 + 20; /* FIXME size of ARP */
> +#ifdef DEBUG
> + puts ("ARP Packet\n");
> +#endif
> + break;
> + case 0x800:
> + length = 14 + 14 +
> + (((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0x10)) &
> + 0xFFFF0000) >> 16); /* FIXME size of IP packet */
> +#ifdef DEBUG
> + puts("IP Packet\n");
> +#endif
> + break;
> + default:
> +#ifdef DEBUG
> + puts("Other Packet\n");
> +#endif
> + length = ENET_MAX_MTU;
> + break;
> + }
> +
> + xemaclite_alignedread ((u32 *) (baseaddress + XEL_RXBUFF_OFFSET),
> + etherrxbuff, length);
> +
> + /* Acknowledge the frame */
> + reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
> + reg &= ~XEL_RSR_RECV_DONE_MASK;
> + out_be32 (baseaddress + XEL_RSR_OFFSET, reg);
> +
> +#ifdef DEBUG
> + printf ("Packet receive from 0x%x, length %dB\n", baseaddress, length);
> +#endif
> + NetReceive ((uchar *) etherrxbuff, length);
> + return 1;
> +
> +}
> +#endif
>
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--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely at secretlab.ca
(403) 399-0195
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