[U-Boot-Users] PPC440EPx/sequoia TLB question...

[Stefan Roese]

On Thursday 24 April 2008, Josh Boyer wrote:
> > > Hard to define "works fine" - this is the same 440EPx platform I'm
> > > asking about over in the embedded Linux mailing list.  I'm pretty sure
> > > the kernel doesn't flag SDRAM as Guarded,
> >
> > Yes, and the 4xx code to dynamically set the SDRAM TLB's in the SPD code
> > doesn't set it either. So it really isn't needed.
>
> Actually, that's not true for kernel memory.  We pin 256MiB TLBs to
> cover lowmem in AS0, and the Guarded bit is set.  We set it to prevent
> speculative access to memory holes where the 256MiB TLB covers more
> address space than there is physical DRAM.

I wasn't aware of this. Thanks for the explanation.

Best regards,
Stefan