[U-Boot-Users] 440EPX is not booting from 1Gb/128MB NAND flash

[Nikhil Gautam]

Thanks Stefan,

I figured couple of more things that needed change

In ndfc.c
#ifdef CFG_NAND_4_ADDR_CYCLE
       /* Set NandFlash Core Configuration Register */
       /* 2 col x 2 rows */
       out32(base + NDFC_CCR, 0x00002000 | (cs << 24));
#else
       /* Set NandFlash Core Configuration Register */
       /* 1 col x 2 rows */
       out32(base + NDFC_CCR, 0x00000000 | (cs << 24));
#endif /* CFG_NAND_4_ADDR_CYCLE */

Also for 1Gb NAND flash, the address fetch is different then 256Mb,
here is what I changed

#ifdef CFG_NAND_4_ADDR_CYCLE
       /* Column address */
       this->write_byte(mtd, 0);
/* A[7:0] */
       this->write_byte(mtd, (uchar)(page_addr & 0x0f));
/* A[11:8] */
       this->write_byte(mtd, (uchar)((page_addr >> 4) & 0xff));
/* A[19:12] */
       /* One more address cycle for devices > 32MiB */
       this->write_byte(mtd, (uchar)((page_addr >> 12) & 0xff));
/* A[27:20] */
#else
       /* Column address */
       this->write_byte(mtd, 0);
/* A[7:0] */
       this->write_byte(mtd, (uchar)(page_addr & 0xff));
/* A[16:9] */
       this->write_byte(mtd, (uchar)((page_addr >> 8) & 0xff));
/* A[24:17] */
#endif

Even with these two changes, the board is not booting??

Nikhil
- Show

On Feb 6, 2008 9:24 PM, Stefan Roese <sr at denx.de> wrote:
>
> On Thursday 07 February 2008, Nikhil Gautam wrote:
> >  I am trying to boot my board which is based on Sequoia 440EPX. The
> >  only difference between my board and the reference board is that I
> >  have a 1 Gb NAND flash ( NAND01GW3B2A) instead of 256Mb flash present
> >  on reference board.
> >
> >  In U-boot I have changed the board configuration file to reflect correct
> > specs.
> >
> >   * Now the NAND chip has to be defined (no autodetection used!)
> >   */
> >  #define CFG_NAND_PAGE_SIZE      (2048)          /* NAND chip page
> > size          */
> >  #define CFG_NAND_BLOCK_SIZE     (128 << 10)     /* NAND chip block
> > size         */
> >  #define CFG_NAND_PAGE_COUNT     (64)            /* NAND chip page
> > count         */
> >  #define CFG_NAND_BAD_BLOCK_POS  (5)             /* Location of bad
> > block marker */
> >  #define CFG_NAND_4_ADDR_CYCLE                   /* Fourth addr used
> > (>32MB)     */
> >
> >  I have also changed the eeprom configuration word to
> >  0x87788252
> >  0x0947D010
> >  0xA0A82358
> >  0x0D050000
> >
> >  Is there any other place where some NAND configuration is defined?
>
> Could be that nand_spl/nand_boot.c needs to be changed to support booting from
> 2k page sized devices too. It was only tested on 512 byte page devices till
> now.
>
> I can only recommend to debug using an BDI2000. But you have probably already
> realized, that NAND booting debugging is not that easy.
>
> Best regards,
> Stefan
>
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