[U-Boot-Users] [PATCH] MPC8568E-MDS: set up QE pario for UART1

Andy Fleming afleming at gmail.com
Wed Jan 9 08:54:12 CET 2008


applied, thanks!

For both of the 8568 patches, I modified them to apply to the top of
tree.  Since it was a simple change (mpc8568mds directory was moved to
board/freescale/), I did it.

On 10/22/07, Anton Vorontsov <avorontsov at ru.mvista.com> wrote:
> To use UART1 on the MPC8568E-MDS, QE pario pins PC[0:3] should
> be set up appropriately.
>
> Signed-off-by: Anton Vorontsov <avorontsov at ru.mvista.com>
> ---
>  board/mpc8568mds/mpc8568mds.c |    7 +++++++
>  1 files changed, 7 insertions(+), 0 deletions(-)
>
> diff --git a/board/mpc8568mds/mpc8568mds.c b/board/mpc8568mds/mpc8568mds.c
> index 2b3f44f..ff04ddc 100644
> --- a/board/mpc8568mds/mpc8568mds.c
> +++ b/board/mpc8568mds/mpc8568mds.c
> @@ -84,6 +84,13 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
>         {1, 31, 2, 0, 3}, /* GTX125 */
>         {4,  6, 3, 0, 2}, /* MDIO */
>         {4,  5, 1, 0, 2}, /* MDC */
> +
> +       /* UART1 */
> +       {2, 0, 1, 0, 2}, /* UART_SOUT1 */
> +       {2, 1, 1, 0, 2}, /* UART_RTS1 */
> +       {2, 2, 2, 0, 2}, /* UART_CTS1 */
> +       {2, 3, 2, 0, 2}, /* UART_SIN1 */
> +
>         {0,  0, 0, 0, QE_IOP_TAB_END}, /* END of table */
>  };
>
> --
> 1.5.0.6
>
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