[U-Boot-Users] [PATCH] Enable the isdram command on the MPC8360EMDS board
Jon Loeliger
jdl at freescale.com
Mon Jan 14 20:51:09 CET 2008
On Sat, 2008-01-12 at 12:24, Jerry Van Baren wrote:
> Hi Kim,
>
> The isdram command is controlled separately from the rest of the i2c
> commands (CONFIG_CMD_I2C + CONFIG_CMD_SDRAM). I did this originally
> because the isdram command was arguably a memory consuming luxury.
> Luxuries tend to become necessities over time...
>
> Larry Johnson submitted a patch yesterday to extend the decoding and
> printout to include DDR2 fields, making this even more useful (and jdl
> is claiming a share of the credit ;-).
>
> gvb
I'm not claiming any credit for it, but if I do the
following command:
$ git show d9b94f28a442b001 -- cpu/mpc85xx/spd_sdram.c
Someone who impersonated me quite well appears to have
checked in whole bunch of DDR2 decode stuff way back in
July of 2005.
For example:
+/*
+ * Convert a two-nibble BCD value into a cycle time.
+ * While the spec calls for nano-seconds, picos are returned.
+ *
+ * This implements the tables for bytes 9, 23 and 25 for both
+ * DDR I and II. No allowance for distinguishing the invalid
+ * fields absent for DDR I yet present in DDR II is made.
+ * (That is, cycle times of .25, .33, .66 and .75 ns are
+ * allowed for both DDR II and I.)
+ */
+
unsigned int
-banksize(unsigned char row_dens)
+convert_bcd_tenths_to_cycle_time_ps(unsigned int spd_val)
{
- return ((row_dens >> 2) | ((row_dens & 3) << 6)) << 24;
+ /*
+ * Table look up the lower nibble, allow DDR I & II.
+ */
+ unsigned int tenths_ps[16] = {
+ 0,
+ 100,
+ 200,
+ 300,
+ 400,
+ 500,
+ 600,
+ 700,
+ 800,
+ 900,
+ 250,
+ 330, /* FIXME: Is 333 better/valid? */
+ 660, /* FIXME: Is 667 better/valid? */
+ 750,
+ 0, /* undefined */
+ 0 /* undefined */
+ };
+
Weird, huh?
jdl
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