[U-Boot-Users] [PATCH 04/10] [ARM] TQMA31: add new board with i.MX31 processor

[Magnus Lilja]

Hi,

Jens Gehrlein wrote:
> diff --git a/board/tqc/tqma31/lowlevel_init.S b/board/tqc/tqma31/lowlevel_init.S
> new file mode 100644
> index 0000000..50db3a1
> --- /dev/null
> +++ b/board/tqc/tqma31/lowlevel_init.S
> @@ -0,0 +1,375 @@
> +/*
> + * Copyright (C) 2008, Guennadi Liakhovetski <lg at denx.de>
> + * Copyright (C) 2008, Jens Gehrlein <sew_s at tqs.de>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <asm/arch/mx31-regs.h>
> +#include <config.h>
> +
> +.macro REG reg, val
> +	ldr r2, =\reg
> +	ldr r3, =\val
> +	str r3, [r2]
> +.endm
> +
> +.macro REG8 reg, val
> +	ldr r2, =\reg
> +	ldr r3, =\val
> +	strb r3, [r2]
> +.endm
> +
> +.macro DELAY loops
> +	ldr r2, =\loops
> +1:
> +	subs	r2, r2, #1
> +	nop
> +	bcs 1b
> +.endm
> +
> +
> +/*
> + * AIPS setup - Only setup MPROTx registers.
> + * The PACR default values are good.
> + */
> +.macro init_aips
> +
> +	/* Setup the Peripheral Port Remap register inside the core */
> +	ldr r0, =0x40000015        /* start from AIPS 2GB region */
> +	mcr p15, 0, r0, c15, c2, 4
> +
> +	/*
> +	 * Set all MPROTx to be non-bufferable, trusted for R/W,
> +	 * not forced to user-mode.
> +	 */
> +	ldr r0, =0x43F00000

How about adding/using symbolic names for i.MX31 register addresses also in the init_aips, init_max, init_m3if and init_drive_strength macros? It helps readability IMO.


Regards, Magnus