[U-Boot-Users] [PATCH 7/7] ARM: Add support for S3C6400 based SMDK6400 board
Ben Warren
biggerbadderben at gmail.com
Thu Jul 31 15:43:16 CEST 2008
On Thu, Jul 31, 2008 at 3:55 AM, Guennadi Liakhovetski <lg at denx.de> wrote:
> This board can only boot U-Boot from NAND-flash. This patch adds a nand_spl
> driver for it too. SMDK6400 can also boot from the NOR flash, but due to
> hardware limitations it can only address 64KiB on it, which is not enough for
> U-Boot. Ported from u-boot-1.1.6 version by Samsung.
>
> Signed-off-by: Guennadi Liakhovetski <lg at denx.de>
> ---
> MAKEALL | 1
> Makefile | 17 +
> board/samsung/smdk6400/Makefile | 51 +++++
> board/samsung/smdk6400/config.mk | 27 +++
> board/samsung/smdk6400/lowlevel_init.S | 315 ++++++++++++++++++++++++++
> board/samsung/smdk6400/smdk6400.c | 178 +++++++++++++++
> board/samsung/smdk6400/u-boot-nand.lds | 60 +++++
> include/configs/smdk6400.h | 338 ++++++++++++++++++++++++++++
> nand_spl/board/samsung/smdk6400/Makefile | 103 +++++++++
> nand_spl/board/samsung/smdk6400/config.mk | 40 ++++
> nand_spl/board/samsung/smdk6400/u-boot.lds | 58 +++++
> 11 files changed, 1188 insertions(+), 0 deletions(-)
> create mode 100644 board/samsung/smdk6400/Makefile
> create mode 100644 board/samsung/smdk6400/config.mk
> create mode 100644 board/samsung/smdk6400/lowlevel_init.S
> create mode 100644 board/samsung/smdk6400/smdk6400.c
> create mode 100644 board/samsung/smdk6400/u-boot-nand.lds
> create mode 100644 include/configs/smdk6400.h
> create mode 100644 nand_spl/board/samsung/smdk6400/Makefile
> create mode 100644 nand_spl/board/samsung/smdk6400/config.mk
> create mode 100644 nand_spl/board/samsung/smdk6400/u-boot.lds
>
> diff --git a/MAKEALL b/MAKEALL
> index ee83cca..a3ed47d 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -515,6 +515,7 @@ LIST_ARM11=" \
> imx31_litekit \
> imx31_phycore \
> mx31ads \
> + smdk6400 \
> "
>
> #########################################################################
> diff --git a/Makefile b/Makefile
> index b104617..0c5b8a6 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -2677,6 +2677,23 @@ mx31ads_config : unconfig
> omap2420h4_config : unconfig
> @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
>
> +#########################################################################
> +## ARM1176 Systems
> +#########################################################################
> +smdk6400_noUSB_config \
> +smdk6400_config : unconfig
> + @mkdir -p $(obj)include $(obj)board/samsung/smdk6400
> + @mkdir -p $(obj)nand_spl/board/samsung/smdk6400
> + @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
> + @if [ -z "$(findstring smdk6400_noUSB_config,$@)" ]; then \
> + echo "RAM_TEXT = 0x57e00000" >> $(obj)board/samsung/smdk6400/config.tmp;\
> + $(MKCONFIG) $(@:_config=) arm arm1176 smdk6400 samsung s3c64xx; \
> + else \
> + echo "RAM_TEXT = 0xc7e00000" >> $(obj)board/samsung/smdk6400/config.tmp;\
> + $(MKCONFIG) $(@:_noUSB_config=) arm arm1176 smdk6400 samsung s3c64xx; \
> + fi
> + @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
> +
> #========================================================================
> # i386
> #========================================================================
> diff --git a/board/samsung/smdk6400/Makefile b/board/samsung/smdk6400/Makefile
> new file mode 100644
> index 0000000..1200e45
> --- /dev/null
> +++ b/board/samsung/smdk6400/Makefile
> @@ -0,0 +1,51 @@
> +#
> +# (C) Copyright 2000, 2001, 2002
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB = lib$(BOARD).a
> +
> +OBJS := smdk6400.o
> +#OBJS := smdk6400.o flash.o
> +SOBJS := lowlevel_init.o
> +
> +$(LIB): $(OBJS) $(SOBJS)
> + $(AR) crv $@ $(SOBJS) $(OBJS)
> +
> +clean:
> + rm -f $(SOBJS) $(OBJS)
> +
> +distclean: clean
> + rm -f $(LIB) core *.bak .depend
> +
> +#########################################################################
> +
> +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
> + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +-include .depend
> +
> +#########################################################################
> diff --git a/board/samsung/smdk6400/config.mk b/board/samsung/smdk6400/config.mk
> new file mode 100644
> index 0000000..d66e242
> --- /dev/null
> +++ b/board/samsung/smdk6400/config.mk
> @@ -0,0 +1,27 @@
> +#
> +# (C) Copyright 2002
> +# Gary Jennejohn, DENX Software Engineering, <gj at denx.de>
> +# David Mueller, ELSOFT AG, <d.mueller at elsoft.ch>
> +#
> +# SAMSUNG SMDK6400 board with mDirac3 (ARM1176) cpu
> +#
> +# see http://www.samsung.com/ for more information on SAMSUNG
> +
> +# On SMDK6400 we use the 64 MB SDRAM bank at
> +#
> +# 0x50000000 to 0x58000000
> +#
> +# Linux-Kernel is expected to be at 0x50008000, entry 0x50008000
> +#
> +# we load ourselves to 0x57e00000 without MMU
> +# with MMU, load address is changed to 0xc7e00000
> +#
> +# download area is 0x5000c000
> +
> +sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
> +
> +ifndef CONFIG_NAND_SPL
> +TEXT_BASE = $(RAM_TEXT)
> +else
> +TEXT_BASE = 0
> +endif
> diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S
> new file mode 100644
> index 0000000..9371415
> --- /dev/null
> +++ b/board/samsung/smdk6400/lowlevel_init.S
> @@ -0,0 +1,310 @@
> +/*
> + * Memory Setup stuff - taken from blob memsetup.S
> + *
> + * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw at its.tudelft.nl) and
> + * Jan-Derk Bakker (J.D.Bakker at its.tudelft.nl)
> + *
> + * Modified for the Samsung SMDK2410 by
> + * (C) Copyright 2002
> + * David Mueller, ELSOFT AG, <d.mueller at elsoft.ch>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +
> +#include <config.h>
> +#include <version.h>
> +
> +#include <s3c6400.h>
> +
> +#ifdef CONFIG_SERIAL1
> +#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART0_OFFSET)
> +#elif defined(CONFIG_SERIAL2)
> +#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART1_OFFSET)
> +#else
> +#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART2_OFFSET)
> +#endif
> +
> +_TEXT_BASE:
> + .word TEXT_BASE
> +
> + .globl lowlevel_init
> +lowlevel_init:
> + mov r12, lr
> +
> + /* LED on only #8 */
> + ldr r0, =ELFIN_GPIO_BASE
> + ldr r1, =0x55540000
> + str r1, [r0, #GPNCON_OFFSET]
> +
> + ldr r1, =0x55555555
> + str r1, [r0, #GPNPUD_OFFSET]
> +
> + ldr r1, =0xf000
> + str r1, [r0, #GPNDAT_OFFSET]
> +
> + /* Disable Watchdog */
> + ldr r0, =0x7e000000 @0x7e004000
> + orr r0, r0, #0x4000
> + mov r1, #0
> + str r1, [r0]
> +
> + @ External interrupt pending clear
> + ldr r0, =(ELFIN_GPIO_BASE+EINTPEND_OFFSET) /*EINTPEND*/
> + ldr r1, [r0]
> + str r1, [r0]
> +
> + ldr r0, =ELFIN_VIC0_BASE_ADDR @0x71200000
> + ldr r1, =ELFIN_VIC1_BASE_ADDR @0x71300000
> +
> + @ Disable all interrupts (VIC0 and VIC1)
> + mvn r3, #0x0
> + str r3, [r0, #oINTMSK]
> + str r3, [r1, #oINTMSK]
> +
> + @ Set all interrupts as IRQ
> + mov r3, #0x0
> + str r3, [r0, #oINTMOD]
> + str r3, [r1, #oINTMOD]
> +
> + @ Pending Interrupt Clear
> + mov r3, #0x0
> + str r3, [r0, #oVECTADDR]
> + str r3, [r1, #oVECTADDR]
> +
> + /* init system clock */
> + bl system_clock_init
> +
> +#ifndef CONFIG_NAND_SPL
> + /* for UART */
> + bl uart_asm_init
> +#endif
> +
> +#ifdef CONFIG_BOOT_NAND
> + /* simple init for NAND */
> + bl nand_asm_init
> +#endif
> +
> + bl mem_ctrl_asm_init
> +
> +/* This looks like wakeup support. Don't know if it's going to be used, untested. */
> +#if 1
> + ldr r0, =(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET)
> + ldr r1, [r0]
> + bic r1, r1, #0xfffffff7
> + cmp r1, #0x8
> + beq wakeup_reset
> +#endif
> +
> +1:
> + mov lr, r12
> + mov pc, lr
> +
> +#if 1
> +wakeup_reset:
> +
> + /*Clear wakeup status register*/
> + ldr r0, =(ELFIN_CLOCK_POWER_BASE+WAKEUP_STAT_OFFSET)
> + ldr r1, [r0]
> + str r1, [r0]
> +
> + /*LED test*/
> + ldr r0, =ELFIN_GPIO_BASE
> + ldr r1, =0x3000
> + str r1, [r0, #GPNDAT_OFFSET]
> +
> + /*Load return address and jump to kernel*/
> + ldr r0, =(ELFIN_CLOCK_POWER_BASE + INF_REG0_OFFSET)
> + ldr r1, [r0] /* r1 = physical address of s3c6400_cpu_resume function*/
> + mov pc, r1 /*Jump to kernel (sleep-s3c6400.S)*/
> + nop
> + nop
> +#endif
> +/*
> + * system_clock_init: Initialize core clock and bus clock.
> + * void system_clock_init(void)
> + */
> +system_clock_init:
> + ldr r0, =ELFIN_CLOCK_POWER_BASE /* 0x7e00f000 */
> +
> + /* FIXME: OTHERS configutation seriously contradicts the datasheet.
> + * E.g., it touches reserved bits. */
> +#ifdef CONFIG_SYNC_MODE
> + ldr r1, [r0, #OTHERS_OFFSET]
> + mov r2, #0x40
> + orr r1, r1, r2
> + str r1, [r0, #OTHERS_OFFSET]
> +
> + nop
> + nop
> + nop
> + nop
> + nop
> +#error "SYNC mode is broken. Bit 7 is reserved, does 0x40 have to be set again?"
> + ldr r2, =0x80
> + orr r1, r1, r2
> + str r1, [r0, #OTHERS_OFFSET]
> +
> +check_syncack:
> +#error "SYNC mode is broken. Bits [11:7] are reserved."
> + ldr r1, [r0, #OTHERS_OFFSET]
> + ldr r2, =0xf00
> + and r1, r1, r2
> + cmp r1, #0xf00
> + bne check_syncack
> +#else /* ASYNC Mode */
> + nop
> + nop
> + nop
> + nop
> + nop
> +/*
> + ldr r1, [r0, #OTHERS_OFFSET]
> + orr r1, r1, #0x40
> + str r1, [r0, #OTHERS_OFFSET]
> +
> +wait_for_async:
> + ldr r1, [r0, #OTHERS_OFFSET]
> + and r1, r1, #0xf00
> + cmp r1, #0x0
> + bne wait_for_async
> +*/
> + ldr r1, [r0, #OTHERS_OFFSET]
> + bic r1, r1, #0x40
> + str r1, [r0, #OTHERS_OFFSET]
> +#endif
> +
> + mov r1, #0xff00
> + orr r1, r1, #0xff
> + str r1, [r0, #APLL_LOCK_OFFSET]
> + str r1, [r0, #MPLL_LOCK_OFFSET]
> +
> +
> + ldr r1, [r0, #CLK_DIV0_OFFSET] /* Set Clock Divider */
> + bic r1, r1, #0x30000
> + bic r1, r1, #0xff00
> + bic r1, r1, #0xff
> + ldr r2, =CLK_DIV_VAL
> + orr r1, r1, r2
> + str r1, [r0, #CLK_DIV0_OFFSET]
> +
> + ldr r1, =APLL_VAL
> + str r1, [r0, #APLL_CON_OFFSET]
> + ldr r1, =MPLL_VAL
> + str r1, [r0, #MPLL_CON_OFFSET]
> +
> + ldr r1, =0x200203 /* FOUT of EPLL is 96MHz */
> + str r1, [r0, #EPLL_CON0_OFFSET]
> + ldr r1, =0x0
> + str r1, [r0, #EPLL_CON1_OFFSET]
> +
> + ldr r1, [r0, #CLK_SRC_OFFSET] /* APLL, MPLL, EPLL select to Fout */
> + orr r1, r1, #0x7
> + str r1, [r0, #CLK_SRC_OFFSET]
> +
> + /* wait at least 200us to stablize all clock */
> + mov r1, #0x10000
> +1: subs r1, r1, #1
> + bne 1b
> +
> + /* See above. According to S3C6400X_UM_rev1.00_20080222.pdf
> + * 0x20 is reserved */
> +#ifdef CONFIG_SYNC_MODE /* Synchronization for VIC port */
> + ldr r1, [r0, #OTHERS_OFFSET]
> + orr r1, r1, #0x40
> + str r1, [r0, #OTHERS_OFFSET]
> +#else
> + ldr r1, [r0, #OTHERS_OFFSET]
> + bic r1, r1, #0x40
> + str r1, [r0, #OTHERS_OFFSET]
> +#endif
> + mov pc, lr
> +
> +
> +#ifndef CONFIG_NAND_SPL
> +/*
> + * uart_asm_init: Initialize UART's pins
> + */
> +uart_asm_init:
> + /* set GPIO to enable UART */
> + @ GPIO setting for UART
> + ldr r0, =ELFIN_GPIO_BASE
> + ldr r1, =0x220022
> + str r1, [r0, #GPACON_OFFSET]
> + mov pc, lr
> +#endif
> +
> +#ifdef CONFIG_BOOT_NAND
> +/*
> + * Nand Interface Init for SMDK6400
> + */
> +nand_asm_init:
> + ldr r0, =ELFIN_NAND_BASE
> + ldr r1, [r0, #NFCONF_OFFSET]
> + orr r1, r1, #0x70
> + orr r1, r1, #0x7700
> + str r1, [r0, #NFCONF_OFFSET]
> +
> + ldr r1, [r0, #NFCONT_OFFSET]
> + orr r1, r1, #0x07
> + str r1, [r0, #NFCONT_OFFSET]
> +
> + mov pc, lr
> +#endif
> +
> +#ifdef CONFIG_ENABLE_MMU
> +/*
> + * MMU Table for SMDK6400
> + */
> +
> + /* form a first-level section entry */
> +.macro FL_SECTION_ENTRY base,ap,d,c,b
> + .word (\base << 20) | (\ap << 10) | \
> + (\d << 5) | (1<<4) | (\c << 3) | (\b << 2) | (1<<1)
> +.endm
> +
> +.section .mmudata, "a"
> + .align 14
> + /* the following alignment creates the mmu table at address 0x4000. */
> + .globl mmu_table
> +mmu_table:
> + .set __base,0
> + /* 1:1 mapping for debugging */
> + .rept 0xA00
> + FL_SECTION_ENTRY __base,3,0,0,0
> + .set __base,__base+1
> + .endr
> +
> + /* access is not allowed. */
> + .rept 0xC00 - 0xA00
> + .word 0x00000000
> + .endr
> +
> + /* 128MB for SDRAM 0xC0000000 -> 0x50000000 */
> + .set __base, 0x500
> + .rept 0xC80 - 0xC00
> + FL_SECTION_ENTRY __base,3,0,1,1
> + .set __base,__base+1
> + .endr
> +
> + /* access is not allowed. */
> + .rept 0x1000 - 0xc80
> + .word 0x00000000
> + .endr
> +#endif
> diff --git a/board/samsung/smdk6400/smdk6400.c b/board/samsung/smdk6400/smdk6400.c
> new file mode 100644
> index 0000000..e936b75
> --- /dev/null
> +++ b/board/samsung/smdk6400/smdk6400.c
> @@ -0,0 +1,126 @@
> +/*
> + * (C) Copyright 2002
> + * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
> + * Marius Groeger <mgroeger at sysgo.de>
> + *
> + * (C) Copyright 2002
> + * David Mueller, ELSOFT AG, <d.mueller at elsoft.ch>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <s3c6400.h>
> +
> +/* ------------------------------------------------------------------------- */
> +#define CS8900_Tacs 0x0 /* 0clk address set-up */
> +#define CS8900_Tcos 0x4 /* 4clk chip selection set-up */
> +#define CS8900_Tacc 0xE /* 14clk access cycle */
> +#define CS8900_Tcoh 0x1 /* 1clk chip selection hold */
> +#define CS8900_Tah 0x4 /* 4clk address holding time */
> +#define CS8900_Tacp 0x6 /* 6clk page mode access cycle */
> +#define CS8900_PMC 0x0 /* normal(1data)page mode configuration */
> +
> +static inline void delay(unsigned long loops)
> +{
> + __asm__ volatile ("1:\n" "subs %0, %1, #1\n" "bne 1b":"=r" (loops):"0"(loops));
> +}
> +
> +/*
> + * Miscellaneous platform dependent initialisations
> + */
> +
> +static void cs8900_pre_init(void)
> +{
> + SROM_BW_REG &= ~(0xf << 4);
> + SROM_BW_REG |= (1 << 7) | (1 << 6) | (1 << 4);
> + SROM_BC1_REG = ((CS8900_Tacs << 28) + (CS8900_Tcos << 24) +
> + (CS8900_Tacc << 16) + (CS8900_Tcoh << 12) +
> + (CS8900_Tah << 8) + (CS8900_Tacp << 4) + CS8900_PMC);
> +}
> +
> +int board_init(void)
> +{
> + DECLARE_GLOBAL_DATA_PTR;
> +
> + cs8900_pre_init();
> +
> + /* NOR-flash in SROM0 */
> +
> + /* Enable WAIT */
> + SROM_BW_REG |= 4 | 8 | 1;
> +
> + gd->bd->bi_arch_number = MACH_TYPE;
> + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
> +
> + return 0;
> +}
> +
> +int dram_init(void)
> +{
> + DECLARE_GLOBAL_DATA_PTR;
> +
> + gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_DISPLAY_BOARDINFO
> +int checkboard(void)
> +{
> + printf("Board: SMDK6400\n");
> + return (0);
> +}
> +#endif
> +
> +#ifdef CONFIG_ENABLE_MMU
> +ulong virt_to_phy_smdk6400(ulong addr)
> +{
> + if ((0xc0000000 <= addr) && (addr < 0xc8000000))
> + return (addr - 0xc0000000 + 0x50000000);
> + else
> + printf("do not support this address : %08lx\n", addr);
> +
> + return addr;
> +}
> +#endif
> +
> +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
> +#include <linux/mtd/nand.h>
> +extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
> +void nand_init(void)
> +{
> + nand_probe(CFG_NAND_BASE);
> + if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
> + print_size(nand_dev_desc[0].totlen, "\n");
> + }
> +}
> +#endif
> +
> +ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
> +{
> + if (banknum == 0) { /* non-CFI boot flash */
> + info->portwidth = FLASH_CFI_16BIT;
> + info->chipwidth = FLASH_CFI_BY16;
> + info->interface = FLASH_CFI_X16;
> + return 1;
> + } else
> + return 0;
> +}
> diff --git a/board/samsung/smdk6400/u-boot-nand.lds b/board/samsung/smdk6400/u-boot-nand.lds
> new file mode 100644
> index 0000000..083766e
> --- /dev/null
> +++ b/board/samsung/smdk6400/u-boot-nand.lds
> @@ -0,0 +1,60 @@
> +/*
> + * (C) Copyright 2002
> + * Gary Jennejohn, DENX Software Engineering, <gj at denx.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
> +/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
> +OUTPUT_ARCH(arm)
> +ENTRY(_start)
> +SECTIONS
> +{
> + . = 0x00000000;
> +
> + . = ALIGN(4);
> + .text :
> + {
> + cpu/arm1176/start.o (.text)
> + cpu/arm1176/s3c64xx/cpu_init.o (.text)
> + *(.text)
> + }
> +
> + . = ALIGN(4);
> + .rodata : { *(.rodata) }
> +
> + . = ALIGN(4);
> + .data : { *(.data) }
> +
> + . = ALIGN(4);
> + .got : { *(.got) }
> +
> + __u_boot_cmd_start = .;
> + .u_boot_cmd : { *(.u_boot_cmd) }
> + __u_boot_cmd_end = .;
> +
> + . = ALIGN(4);
> + .mmudata : { *(.mmudata) }
> +
> + . = ALIGN(4);
> + __bss_start = .;
> + .bss : { *(.bss) }
> + _end = .;
> +}
> diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h
> new file mode 100644
> index 0000000..757a8d1
> --- /dev/null
> +++ b/include/configs/smdk6400.h
> @@ -0,0 +1,299 @@
> +/*
> + * (C) Copyright 2002
> + * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
> + * Marius Groeger <mgroeger at sysgo.de>
> + * Gary Jennejohn <gj at denx.de>
> + * David Mueller <d.mueller at elsoft.ch>
> + *
> + * Configuation settings for the SAMSUNG SMDK6400(mDirac-III) board.
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +/*
> + * High Level Configuration Options
> + * (easy to change)
> + */
> +#define CONFIG_S3C6400 1 /* in a SAMSUNG S3C6400 SoC */
> +#define CONFIG_S3C64XX 1 /* in a SAMSUNG S3C64XX Family */
> +#define CONFIG_SMDK6400 1 /* on a SAMSUNG SMDK6400 Board */
> +
> +#define CFG_SDRAM_BASE 0x50000000
> +
> +/* input clock of PLL */
> +#define CONFIG_SYS_CLK_FREQ 12000000 /* the SMDK6400 has 12MHz input clock */
> +
> +#if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000)
> +#define CONFIG_ENABLE_MMU
> +#endif
> +
> +#define CONFIG_MEMORY_UPPER_CODE
> +
> +#define CONFIG_SETUP_MEMORY_TAGS
> +#define CONFIG_CMDLINE_TAG
> +#define CONFIG_INITRD_TAG
> +
> +/*
> + * Architecture magic and machine type
> + */
> +#define MACH_TYPE 1270
> +
> +#define CONFIG_DISPLAY_CPUINFO
> +#define CONFIG_DISPLAY_BOARDINFO
> +
> +#undef CONFIG_SKIP_RELOCATE_UBOOT
> +
> +/*
> + * Size of malloc() pool
> + */
> +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 1024 * 1024)
> +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
> +
> +/*
> + * Hardware drivers
> + */
> +#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
> +#define CS8900_BASE 0x18800300
> +#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
> +
> +/*
> + * select serial console configuration
> + */
> +#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK6400 */
> +
> +#define CFG_HUSH_PARSER /* use "hush" command parser */
> +#ifdef CFG_HUSH_PARSER
> +#define CFG_PROMPT_HUSH_PS2 "> "
> +#endif
> +
> +#define CONFIG_CMDLINE_EDITING
> +
> +/* allow to overwrite serial and ethaddr */
> +#define CONFIG_ENV_OVERWRITE
> +
> +#define CONFIG_BAUDRATE 115200
> +
> +/***********************************************************
> + * Command definition
> + ***********************************************************/
> +#include <config_cmd_default.h>
> +
> +#define CONFIG_CMD_CACHE
> +#define CONFIG_CMD_REGINFO
> +#define CONFIG_CMD_LOADS
> +#define CONFIG_CMD_LOADB
> +#define CONFIG_CMD_ENV
> +#define CONFIG_CMD_NAND
> +#if defined(CONFIG_BOOT_ONENAND)
> +#define CONFIG_CMD_ONENAND
> +#endif
> +#define CONFIG_CMD_PING
> +#define CONFIG_CMD_ELF
> +
> +#define CONFIG_BOOTDELAY 3
> +#define CONFIG_ETHADDR 00:40:5c:26:0a:5b
> +#define CONFIG_NETMASK 255.255.255.0
> +#define CONFIG_IPADDR 192.168.0.20
> +#define CONFIG_SERVERIP 192.168.0.10
> +#define CONFIG_GATEWAYIP 192.168.0.1
Remove these please. Haven't we been through this enough times?
regards,
Ben
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