[U-Boot-Users] CPU (405ep) clock upgrade..

"Yi-Neng Lin (林義能)" yineng.lin at fiberlogic.com
Mon Jun 30 07:33:43 CEST 2008


Hi there,
We've got a board powered by 405ep running at 266MHz. Now we want to
upgrade the clock rate to 333MHz (model: 3LB333C), can anyone give us
some pointers doing this? I've tried to search the mailing list but
found nothing quite related. Also there seems to exist very limited
ports, if not none, of this model to which I may reference.
Below are questions that are more specific:
1. For CPU clock rate configuration, exactly what parameters should I
modify? The suspected ones are FWDV (Feedback Divide) and FBDVB (Forward
Divide B) which according to the processor user manual determines the
PLLOUT A.
2. SDRAM clocking. I guess the clocking should be adapted to something
like 111MHz (given the 333MHz CPU clock); however, the manual shows
there there seems to be only two options, namely 100MHz and 133MHz.
3. Clocking of others such as PCI (on-chip PLB clock, sync/async PCI
clock) and serial port. Are they supposed to be modified accordingly?
4. Any other parameters?

Thank you very much for your guidance.

Yi-Neng




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