[U-Boot-Users] [RFC][MIPS] Remove mips_cache_lock

[Andrew Dyer]

On Mon, Mar 17, 2008 at 4:04 PM, Wolfgang Denk <wd at denx.de> wrote:
> In message <47DE835F.6040500 at ruby.dti.ne.jp> you wrote:
>  > I don't know the background why this lock added. So if I miss something,
>  > please let me know. Or I'll push this before merge window close().
>  ...
>  >       /* Set up temporary stack.
>  >        */
>  > -     li      a0, CFG_INIT_SP_OFFSET
>  > -     la      t9, mips_cache_lock
>  > -     jalr    t9
>  > -     nop
>  > -
>
>  Isn't the lock necessary to use the cache as memory for stack and
>  initial data?

This code has some problems:

Cache locking is not consistent across MIPS implementations.  Some
implementations do not support locking at all.  The style of locking
varies - some support per line locking, others per way, etc, etc.
Some parts use bits in status registers instead of the cache ops.

IIRC, some MIPS cache implementations require valid zeroed RAM to init
cache parity correctly.

The cache never gets unlocked, so the code relies on whatever gets
loaded after u-boot to reinitialize the cache and clear the locks.

-- 
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 The parts of a computer system that can be kicked.