[U-Boot-Users] [RFC][MIPS] Remove mips_cache_lock

[Wolfgang Denk]

In message <c166aa9f0803171655q7820858aoaa48b56ad57525c2 at mail.gmail.com> you wrote:
>
> >  Isn't the lock necessary to use the cache as memory for stack and
> >  initial data?
> 
> This code has some problems:
> 
> Cache locking is not consistent across MIPS implementations.  Some
> implementations do not support locking at all.  The style of locking
> varies - some support per line locking, others per way, etc, etc.
> Some parts use bits in status registers instead of the cache ops.
> 
> IIRC, some MIPS cache implementations require valid zeroed RAM to init
> cache parity correctly.
> 
> The cache never gets unlocked, so the code relies on whatever gets
> loaded after u-boot to reinitialize the cache and clear the locks.

This is most probably true. When this code was implemented first, it
was most probably with a single CPU in mind.

But simply deleting it is definitely not a good idea, as it would most
probably break existing board support.

Best regards,

Wolfgang Denk

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