[U-Boot] [PATCH] inka4x0: board specific RTC support.
Jean-Christophe PLAGNIOL-VILLARD
plagnioj at jcrosoft.com
Thu Nov 20 22:30:21 CET 2008
On 21:58 Thu 20 Nov , ap at denx.de wrote:
> From: Andreas Pfefferle <ap at denx.de>
>
> This patch adds the board specific communication routines needed
> by the external 4543 RTC.
>
> Signed-off-by: Andreas Pfefferle <ap at denx.de>
> ---
> board/inka4x0/inka4x0.c | 124 +++++++++++++++++++++++++++++++++++++++++++++++
> 1 files changed, 124 insertions(+), 0 deletions(-)
>
> diff --git a/board/inka4x0/inka4x0.c b/board/inka4x0/inka4x0.c
> index 507196b..6312b4f 100644
> --- a/board/inka4x0/inka4x0.c
> +++ b/board/inka4x0/inka4x0.c
> @@ -8,6 +8,9 @@
> * (C) Copyright 2004
> * Martin Krause, TQ-Systems GmbH, martin.krause at tqs.de
> *
> + * (C) Copyright 2008
> + * Andreas Pfefferle, DENX Software Engineering, ap at denx.de.
> + *
> * See file CREDITS for list of people who contributed to this
> * project.
> *
> @@ -27,6 +30,7 @@
> * MA 02111-1307 USA
> */
>
> +#include <asm/io.h>
> #include <common.h>
> #include <mpc5xxx.h>
> #include <pci.h>
> @@ -45,6 +49,111 @@
> #error "INKA4x0 SDRAM: invalid chip type specified!"
> #endif
>
> +#if defined(CONFIG_RTC_RTC4543) && defined(CONFIG_CMD_DATE)
please create a rtc.c file and move the compile condition to Makefile
> +
> +#define RTC_CE 0x01000000
^^^^
please use tab instead of whitespcase and so on
> +#define RTC_WR 0x02000000
> +#define RTC_DATA 0x01
> +#define RTC_CLK 0x02
> +
> +#define RTCWRITE(n, data) do {\
^^
please use tab
> + for (i = 0; i < n; i++) {\
^^
please use tab
> + gpio->sint_dvo &= ~RTC_DATA;\
> + if (data & (1 << i))\
> + gpio->sint_dvo |= RTC_DATA;\
> + udelay(10);\
> + gpio->sint_dvo |= RTC_CLK;\
> + udelay(10);\
> + gpio->sint_dvo &= ~RTC_CLK;\
> + udelay(10);\
> + } \
^^
please use tab
> +} while (0)
why not a inline function?
> +
> +#define RTCREAD(n, data) do {\
^^
please use tab
> + for (i = 0; i < n; i++) {\
^^
please use tab
> + gpio->sint_dvo |= RTC_CLK;\
> + udelay(10);\
> + data |= ((gpio->sint_ival & RTC_DATA) << i);\
> + gpio->sint_dvo &= ~RTC_CLK;\
> + udelay(10);\
> + } \
^^
please use tab
> +} while (0)
ditto
> +
> +uchar rtc_read(uchar reg)
> +{
> + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
> + int i;
> + uchar val = 0;
please add a blank line
> + switch (reg) {
> + case 0:
> + /* PSC3_4 is input */
> + gpio->sint_ddr &= ~RTC_DATA;
> + /* Lower WR */
> + out_be32((unsigned *)MPC5XXX_WU_GPIO_DATA_O,
> + in_be32((unsigned *)MPC5XXX_WU_GPIO_DATA_O) & ~RTC_WR);
> + udelay(1);
> + /* Rise CE */
> + out_be32((unsigned *)MPC5XXX_WU_GPIO_DATA_O,
> + in_be32((unsigned *)MPC5XXX_WU_GPIO_DATA_O) | RTC_CE);
> + udelay(1);
> + break;
> + case 1:
> + case 2:
> + case 3:
> + case 5:
> + case 6:
> + case 7:
> + RTCREAD(8, val);
> + break;
> + case 4:
> + RTCREAD(4, val);
> + break;
> + case 8:
> + /* Lower CE */
> + out_be32((unsigned *)MPC5XXX_WU_GPIO_DATA_O,
> + in_be32((unsigned *)MPC5XXX_WU_GPIO_DATA_O) & ~RTC_CE);
> + break;
> + }
> + return val;
> +}
> +
> +void rtc_write(uchar reg, uchar val)
> +{
> + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
> + int i;
please add a blank line
> + switch (reg) {
> + case 0:
> + /* PSC3_4 is output */
> + gpio->sint_ddr |= RTC_DATA;
> + /* Rise WR */
> + out_be32((unsigned *)MPC5XXX_WU_GPIO_DATA_O,
> + in_be32((unsigned *)MPC5XXX_WU_GPIO_DATA_O) | RTC_WR);
> + udelay(1);
> + /* Rise CE */
> + out_be32((unsigned *)MPC5XXX_WU_GPIO_DATA_O,
> + in_be32((unsigned *)MPC5XXX_WU_GPIO_DATA_O) | RTC_CE);
> + udelay(1);
> + break;
> + case 1:
> + case 2:
> + case 3:
> + case 5:
> + case 6:
> + case 7:
> + RTCWRITE(8, val);
> + break;
> + case 4:
> + RTCWRITE(4, val);
> + break;
> + case 8:
> + /* Lower CE */
> + out_be32((unsigned *)MPC5XXX_WU_GPIO_DATA_O,
> + in_be32((unsigned *)MPC5XXX_WU_GPIO_DATA_O) & ~RTC_CE);
> + break;
> + }
> +}
> +#endif
> +
> #ifndef CONFIG_SYS_RAMBOOT
> static void sdram_start (int hi_addr)
> {
> @@ -220,6 +329,21 @@ int misc_init_f (void)
> *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC3_9;
> *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC3_9;
> *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC3_9;
> +
> + /* Configure RTC and Display */
> + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
> + out_be32((unsigned *)MPC5XXX_WU_GPIO_ENABLE,
> + in_be32((unsigned *)MPC5XXX_WU_GPIO_ENABLE) | 0x03000000);
> + out_be32((unsigned *)MPC5XXX_WU_GPIO_DIR,
> + in_be32((unsigned *)MPC5XXX_WU_GPIO_DIR) | 0x03000000);
> + gpio->sint_gpioe |= 0x07;
> + gpio->sint_ddr |= 0x06;
> + gpio->sint_inten &= ~0x03;
> + *(u_long *)MPC5XXX_WU_GPIO_DATA_O &= ~0x01000000;
please do not use diect access
> + gpio->sint_dvo &= ~0x02;
> + gpio->sint_dvo |= 0x04;
> + /* end of RTC and Display configuration */
> +
> return 0;
> }
Best Regards,
J.
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