[U-Boot] (no subject)

Wolfgang Denk wd at denx.de
Sat Oct 4 01:35:09 CEST 2008


Dear Haiying Wang,

In message <1223051524-22415-1-git-send-email-Haiying.Wang at freescale.com> you wrote:
> Fix some bugs:
>   1. Correctly set intlv_ctl in cs_config.
>   2. Correctly set sa, ea in cs_bnds when bank interleaving mode is enabled.
>   3. Set base_address and total memory for each ddr controller in memory
>      controller interleaving mode.

Can you please (re-) submit your patches with a valid subject?

Please keep in mind that the subject is used as the tile line of the
commit message, so it is essential.



Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
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