[U-Boot] [PATCH 1/6] Make DDR interleaving mode work correctly

[Jon Loeliger]

Andy Fleming wrote:
> If Kim and Jon approve, I'll pull these 6 patches into my 85xx-next branch.
> 
> On Fri, Oct 3, 2008 at 11:36 AM, Haiying Wang
> <Haiying.Wang at freescale.com> wrote:
>> Fix some bugs:
>>  1. Correctly set intlv_ctl in cs_config.
>>  2. Correctly set sa, ea in cs_bnds when bank interleaving mode is enabled.
>>  3. Set base_address and total memory for each ddr controller in memory
>>     controller interleaving mode.
>>
>> Signed-off-by: Haiying Wang <Haiying.Wang at freescale.com>


Sounds good by me.

ACK.

jdl