[U-Boot] [PATCH] 85xx do not reset PIC if already configured

[Ed Swarthout]

This allows a second core to restart without causing a PIC reset.

Internal interupt changes:
Enable L2 error interrupt IIVPR0 and give it vector 0x100.
Use correct interrupt (8) for mpc8572 pcie3.
Add pcie3 interrupt (11) for mpc8536ds.

Signed-off-by: Ed Swarthout <Ed.Swarthout at freescale.com>
---
 cpu/mpc85xx/interrupts.c |   21 +++++++++++++++------
 1 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/cpu/mpc85xx/interrupts.c b/cpu/mpc85xx/interrupts.c
index d702ca6..9505ec4 100644
--- a/cpu/mpc85xx/interrupts.c
+++ b/cpu/mpc85xx/interrupts.c
@@ -36,10 +36,15 @@ int interrupt_init_cpu(unsigned long *decrementer_count)
 {
 	volatile ccsr_pic_t *pic = (void *)(CFG_MPC85xx_PIC_ADDR);
 
-	pic->gcr = MPC85xx_PICGCR_RST;
-	while (pic->gcr & MPC85xx_PICGCR_RST)
-		;
-	pic->gcr = MPC85xx_PICGCR_M;
+
+	/* Do not reset PIC if already configured */
+	if (!(pic->gcr & MPC85xx_PICGCR_M)) {
+		pic->gcr = MPC85xx_PICGCR_RST;
+		while (pic->gcr & MPC85xx_PICGCR_RST)
+			;
+		pic->gcr = MPC85xx_PICGCR_M;
+	} else
+		debug("Skipping PICGCR_RST\n");
 
 	*decrementer_count = get_tbclk() / CFG_HZ;
 
@@ -47,6 +52,9 @@ int interrupt_init_cpu(unsigned long *decrementer_count)
 	mtspr(SPRN_TCR, TCR_PIE);
 
 #ifdef CONFIG_INTERRUPTS
+	pic->iivpr0 = 0x810100;	/* 50200 enable l2 interrupts */
+	debug("iivpr0@%x = %x\n", (uint)&pic->iivpr0, pic->iivpr0);
+
 	pic->iivpr1 = 0x810001;	/* 50220 enable ecm interrupts */
 	debug("iivpr1@%x = %x\n", (uint)&pic->iivpr1, pic->iivpr1);
 
@@ -56,7 +64,7 @@ int interrupt_init_cpu(unsigned long *decrementer_count)
 	pic->iivpr3 = 0x810003;	/* 50260 enable lbc interrupts */
 	debug("iivpr3@%x = %x\n", (uint)&pic->iivpr3, pic->iivpr3);
 
-#ifdef CONFIG_PCI1
+#if defined(CONFIG_PCI1) || (defined(CONFIG_PCIE3) && defined(CONFIG_MPC8572))
 	pic->iivpr8 = 0x810008;	/* enable pci1 interrupts */
 	debug("iivpr8@%x = %x\n", (uint)&pic->iivpr8, pic->iivpr8);
 #endif
@@ -68,7 +76,8 @@ int interrupt_init_cpu(unsigned long *decrementer_count)
 	pic->iivpr10 = 0x81000a;	/* enable pcie1 interrupts */
 	debug("iivpr10@%x = %x\n", (uint)&pic->iivpr10, pic->iivpr10);
 #endif
-#ifdef CONFIG_PCIE3
+#if defined(CONFIG_PCIE3) && \
+	(defined(CONFIG_MPC8544) || defined(CONFIG_MPC8536))
 	pic->iivpr11 = 0x81000b;	/* enable pcie3 interrupts */
 	debug("iivpr11@%x = %x\n", (uint)&pic->iivpr11, pic->iivpr11);
 #endif
-- 
1.5.6.5