[U-Boot] [PATCH 1/6] Make DDR interleaving mode work correctly

[Andy Fleming]

On Fri, Oct 3, 2008 at 11:36 AM, Haiying Wang
<Haiying.Wang at freescale.com> wrote:
> Fix some bugs:
>  1. Correctly set intlv_ctl in cs_config.
>  2. Correctly set sa, ea in cs_bnds when bank interleaving mode is enabled.
>  3. Set base_address and total memory for each ddr controller in memory
>     controller interleaving mode.
>
> Signed-off-by: Haiying Wang <Haiying.Wang at freescale.com>

Applied 1-6 to 85xx-next with some modifications from Kumar, thanks