[U-Boot] [PATCH] 85xx: Using proper I2C source clock divider for MPC8544

[Kumar Gala]

On Oct 14, 2008, at 2:11 PM, Wolfgang Grandegger wrote:

> Kumar Gala wrote:
>> On Oct 10, 2008, at 2:29 AM, Wolfgang Grandegger wrote:
>>
>>> Kumar Gala wrote:
>>>> On Sep 30, 2008, at 3:55 AM, Wolfgang Grandegger wrote:
>>>>
>>>>> Measurements with our MPC8544 board showed that the I2C bus
>>>>> frequency
>>>>> is wrong by a factor of 1.5. Obviously, the interpretation of the
>>>>> MPC85xx_PORDEVSR2_SEC_CFG bit of the cfg_sec_freq register is not
>>>>> correct. There seems to be an error in the 8544 RM.
>>>>>
>>>>> Signed-off-by: Wolfgang Grandegger <wg at grandegger.com>
>>>>> ---
>>>>> cpu/mpc85xx/speed.c |    4 ++--
>>>>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>>> can you do me a favor and dump the value of MPC85xx_PORDEVSR2.   
>>>> Also
>>>> can you tell me what rev 8544 you have.
>>> See below:
>>>
>>> pordevsr2 at e00e0014=0x8f00007d
>>>
>>> CPU:   8544E, Version: 1.1, (0x803c0111)
>>> Core:  E500, Version: 2.2, (0x80210022)
>>> Clock Configuration:
>>>        CPU: 667 MHz, CCB: 334 MHz,
>>>        DDR: 167 MHz (334 MT/s data rate), LBC:  41 MHz
>>> L1:    D-cache 32 kB enabled
>>>        I-cache 32 kB enabled
>>> Board: Socrates
>>>
>>> Wolfgang.
>>
>> thanks.  How did you do the measurements that got you this 1.5x  
>> factor?
>
> This afternoon I re-measured the I2C bus clock frequency with the
> oscilloscope at the I2C clock line on our Socrates MPC8544 board. With
> the patch applied, I measured the correct frequency of 100 kHz.  
> Without,
> it was a factor of 1.5 too high.

are you able to change cfg_seq_freq on the board?

- k