[U-Boot] [PATCH] ppc4xx: Generic architecture for xilinx ppc405

Ricardo Ribalda Delgado ricardo.ribalda at uam.es
Thu Oct 16 12:39:50 CEST 2008


As "ppc44x: Unification of virtex5 pp440 boards" did for the xilinx
ppc440 boards, this patch presents a common architecture for all the
xilinx ppc405 boards.

Any custom xilinx ppc405 board can be added very easily with no code
duplicity.

This patch also adds a simple generic board, that can be used on almost
any design with xilinx ppc405 replacing the file ppc405-generic/xparameters.h

This patch is prepared to work with the latest version of EDK (10.1)

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda at uam.es>
---

Please patch it against ppc4xx/next


 CREDITS                                            |    1 +
 MAINTAINERS                                        |    1 +
 Makefile                                           |   16 ++
 board/xilinx/ppc405-generic/.gitignore             |    1 +
 board/xilinx/ppc405-generic/Makefile               |   62 +++++++++
 board/xilinx/ppc405-generic/config.mk              |   25 ++++
 board/xilinx/ppc405-generic/init.S                 |   32 +++++
 board/xilinx/ppc405-generic/u-boot-ram.lds         |  134 ++++++++++++++++++
 board/xilinx/ppc405-generic/u-boot-rom.lds         |  144 ++++++++++++++++++++
 .../xilinx/ppc405-generic/xilinx_ppc405_generic.c  |   59 ++++++++
 board/xilinx/ppc405-generic/xparameters.h          |   36 +++++
 include/configs/xilinx-ppc405-generic.h            |   58 ++++++++
 include/configs/xilinx-ppc405.h                    |  123 +++++++++++++++++
 13 files changed, 692 insertions(+), 0 deletions(-)
 create mode 100644 board/xilinx/ppc405-generic/.gitignore
 create mode 100644 board/xilinx/ppc405-generic/Makefile
 create mode 100644 board/xilinx/ppc405-generic/config.mk
 create mode 100644 board/xilinx/ppc405-generic/init.S
 create mode 100644 board/xilinx/ppc405-generic/u-boot-ram.lds
 create mode 100644 board/xilinx/ppc405-generic/u-boot-rom.lds
 create mode 100644 board/xilinx/ppc405-generic/xilinx_ppc405_generic.c
 create mode 100644 board/xilinx/ppc405-generic/xparameters.h
 create mode 100644 include/configs/xilinx-ppc405-generic.h
 create mode 100644 include/configs/xilinx-ppc405.h

diff --git a/CREDITS b/CREDITS
index 3767322..9ddf0d2 100644
--- a/CREDITS
+++ b/CREDITS
@@ -407,6 +407,7 @@ N: Ricardo Ribalda Delgado
 E: ricardo.ribalda at uam.es
 D: PPC440x5 (Virtex5), ML507 Board, eeprom_simul, adt7460, v5fx30teval
 D: Virtex ppc440 generic architecture
+D: Virtex ppc405 generic architecture
 W: http://www.ii.uam.es/~rribalda
 
 N: Stefan Roese
diff --git a/MAINTAINERS b/MAINTAINERS
index 0f9b213..dfc3b56 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -320,6 +320,7 @@ Ricardo Ribalda <ricardo.ribalda at uam.es>
 	ml507 		PPC440x5
 	v5fx30teval	PPC440x5
 	xilinx-pp440-generic	PPC440x5
+	xilinx-pp405-generic	PPC404
 
 Stefan Roese <sr at denx.de>
 
diff --git a/Makefile b/Makefile
index dc0a896..06ba2c6 100644
--- a/Makefile
+++ b/Makefile
@@ -1516,6 +1516,22 @@ sycamore_config: unconfig
 WUH405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx wuh405 esd
 
+xilinx-ppc405-generic_flash_config: unconfig
+	@mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
+	@echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds"\
+		> $(obj)board/xilinx/ppc405-generic/config.tmp
+	@echo "TEXT_BASE := 0xFE360000" \
+		>> $(obj)board/xilinx/ppc405-generic/config.tmp
+	@$(MKCONFIG) xilinx-ppc405-generic ppc ppc4xx ppc405-generic xilinx
+
+xilinx-ppc405-generic_config: unconfig
+	@mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
+	@echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds"\
+		> $(obj)board/xilinx/ppc405-generic/config.tmp
+	@echo "TEXT_BASE := 0x04000000" \
+		>> $(obj)board/xilinx/ppc405-generic/config.tmp
+	@$(MKCONFIG) xilinx-ppc405-generic ppc ppc4xx ppc405-generic xilinx
+
 xilinx-ppc440-generic_flash_config: unconfig
 	@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
 	@echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds"\
diff --git a/board/xilinx/ppc405-generic/.gitignore b/board/xilinx/ppc405-generic/.gitignore
new file mode 100644
index 0000000..b644f59
--- /dev/null
+++ b/board/xilinx/ppc405-generic/.gitignore
@@ -0,0 +1 @@
+config.tmp
diff --git a/board/xilinx/ppc405-generic/Makefile b/board/xilinx/ppc405-generic/Makefile
new file mode 100644
index 0000000..bda22e4
--- /dev/null
+++ b/board/xilinx/ppc405-generic/Makefile
@@ -0,0 +1,62 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# (C) Copyright 2008
+# Ricardo Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda at uam.es
+# Work supported by Qtechnology http://www.qtec.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+ifneq ($(OBJTREE),$(SRCTREE))
+endif
+
+INCS		:=
+CFLAGS		+= $(INCS)
+HOST_CFLAGS	+= $(INCS)
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	+= ../../xilinx/ppc405-generic/xilinx_ppc405_generic.o
+
+SOBJS	+= ../../xilinx/ppc405-generic/init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/xilinx/ppc405-generic/config.mk b/board/xilinx/ppc405-generic/config.mk
new file mode 100644
index 0000000..6d76755
--- /dev/null
+++ b/board/xilinx/ppc405-generic/config.mk
@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2008
+# Ricardo Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda at uam.es
+# Work supported by Qtechnology http://www.qtec.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
diff --git a/board/xilinx/ppc405-generic/init.S b/board/xilinx/ppc405-generic/init.S
new file mode 100644
index 0000000..c05a211
--- /dev/null
+++ b/board/xilinx/ppc405-generic/init.S
@@ -0,0 +1,32 @@
+/*
+ * (C) Copyright 2008
+ *
+ * Georg Schardt <schardt at team-ctech.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+	.globl ext_bus_cntlr_init
+ext_bus_cntlr_init:
+	blr
+
+	.globl sdram_init
+sdram_init:
+	blr
diff --git a/board/xilinx/ppc405-generic/u-boot-ram.lds b/board/xilinx/ppc405-generic/u-boot-ram.lds
new file mode 100644
index 0000000..0004d61
--- /dev/null
+++ b/board/xilinx/ppc405-generic/u-boot-ram.lds
@@ -0,0 +1,134 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+ENTRY(_start)
+
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text)	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+    *(.rodata.str1.4)
+    *(.eh_frame)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = .;
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  . = .;
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss (NOLOAD)       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+
+  ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CFG_MONITOR_BASE, CFG_MONITOR_LEN and TEXT_BASE may need to be modified.");
+
+  _end = . ;
+  PROVIDE (end = .);
+}
diff --git a/board/xilinx/ppc405-generic/u-boot-rom.lds b/board/xilinx/ppc405-generic/u-boot-rom.lds
new file mode 100644
index 0000000..d2bac9f
--- /dev/null
+++ b/board/xilinx/ppc405-generic/u-boot-rom.lds
@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+ENTRY(_start)
+
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  .bootpg 0xFFFFF000 :
+  {
+    cpu/ppc4xx/start.o	(.bootpg)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text)	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+    *(.rodata.str1.4)
+    *(.eh_frame)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = .;
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  . = .;
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss (NOLOAD)       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+
+  ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CFG_MONITOR_BASE, CFG_MONITOR_LEN and TEXT_BASE may need to be modified.");
+
+  _end = . ;
+  PROVIDE (end = .);
+}
diff --git a/board/xilinx/ppc405-generic/xilinx_ppc405_generic.c b/board/xilinx/ppc405-generic/xilinx_ppc405_generic.c
new file mode 100644
index 0000000..305b2f0
--- /dev/null
+++ b/board/xilinx/ppc405-generic/xilinx_ppc405_generic.c
@@ -0,0 +1,59 @@
+/*
+ * (C) Copyright 2008
+ * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda at uam.es
+ * This work has been supported by: QTechnology  http://qtec.com/
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include <config.h>
+#include <common.h>
+#include <asm/processor.h>
+
+ulong __get_PCI_freq(void)
+{
+	return 0;
+}
+
+ulong get_PCI_freq(void) __attribute__((weak, alias("__get_PCI_freq")));
+
+int __board_pre_init(void)
+{
+	return 0;
+}
+int board_pre_init(void) __attribute__((weak, alias("__board_pre_init")));
+
+int __checkboard(void)
+{
+	puts("Xilinx PPC405 Generic Board\n");
+	return 0;
+}
+int checkboard(void) __attribute__((weak, alias("__checkboard")));
+
+phys_size_t __initdram(int board_type)
+{
+	return get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR,
+			    CFG_SDRAM_SIZE_MB * 1024 * 1024);
+}
+phys_size_t initdram(int) __attribute__((weak, alias("__initdram")));
+
+void __get_sys_info(sys_info_t *sysInfo)
+{
+	sysInfo->freqProcessor = XPAR_CORE_CLOCK_FREQ_HZ;
+	sysInfo->freqPLB = XPAR_PLB_CLOCK_FREQ_HZ;
+	sysInfo->freqPCI = 0;
+
+	return;
+}
+void get_sys_info(sys_info_t *) __attribute__((weak, alias("__get_sys_info")));
diff --git a/board/xilinx/ppc405-generic/xparameters.h b/board/xilinx/ppc405-generic/xparameters.h
new file mode 100644
index 0000000..e8e8ced
--- /dev/null
+++ b/board/xilinx/ppc405-generic/xparameters.h
@@ -0,0 +1,36 @@
+/*
+ * (C) Copyright 2008
+ * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda at uam.es
+ * This work has been supported by: QTechnology  http://qtec.com/
+ * based on xparameters-ml507.h by Xilinx
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef XPARAMETER_H
+#define XPARAMETER_H
+
+#define XPAR_DDR2_SDRAM_MEM_BASEADDR	0x00000000
+#define XPAR_IIC_EEPROM_BASEADDR	0x81600000
+#define XPAR_INTC_0_BASEADDR		0x81800000
+#define XPAR_SPI_0_BASEADDR             0x83400000
+#define XPAR_UARTLITE_0_BASEADDR	0x84000000
+#define XPAR_FLASH_MEM0_BASEADDR	0xFE000000
+#define XPAR_PLB_CLOCK_FREQ_HZ		100000000
+#define XPAR_CORE_CLOCK_FREQ_HZ		400000000
+#define XPAR_INTC_MAX_NUM_INTR_INPUTS	13
+#define XPAR_UARTLITE_0_BAUDRATE	9600
+#define XPAR_SPI_0_NUM_TRANSFER_BITS	8
+
+#endif
diff --git a/include/configs/xilinx-ppc405-generic.h b/include/configs/xilinx-ppc405-generic.h
new file mode 100644
index 0000000..6e310cd
--- /dev/null
+++ b/include/configs/xilinx-ppc405-generic.h
@@ -0,0 +1,58 @@
+/*
+ *
+ * (C) Copyright 2008
+ * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda at uam.es
+ * This work has been supported by: QTechnology  http://qtec.com/
+ *
+ * (C) Copyright 2008
+ * Georg Schardt <schardt at team-ctech.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __CONFIG_GEN_H
+#define __CONFIG_GEN_H
+
+#include "../board/xilinx/ppc405-generic/xparameters.h"
+
+/* sdram */
+#define CFG_SDRAM_SIZE_MB	256
+
+/* environment */
+#define CONFIG_ENV_IS_IN_FLASH	1
+#define CONFIG_ENV_SIZE		0x10000
+#define CONFIG_ENV_SECT_SIZE	0x10000
+#define CFG_ENV_OFFSET		0x3F0000
+#define CONFIG_ENV_ADDR            (CFG_FLASH_BASE+CFG_ENV_OFFSET)
+#define CONFIG_ENV_OVERWRITE	1
+
+/*Misc*/
+#define CFG_PROMPT		"board:/# "     /* Monitor Command Prompt    */
+#define CONFIG_PREBOOT		"echo U-Boot is up and runnining;"
+
+/*Flash*/
+#define CFG_FLASH_BASE		XPAR_FLASH_MEM0_BASEADDR
+#define CFG_FLASH_SIZE		(32*1024*1024)
+#define CFG_MAX_FLASH_SECT	71
+#define CFG_FLASH_CFI		1
+#define CONFIG_FLASH_CFI_DRIVER	1
+#define MTDIDS_DEFAULT		"nor0=ppc405-flash"
+#define MTDPARTS_DEFAULT	"mtdpartsa=ppc405-flash:-(user)"
+
+#include <configs/xilinx-ppc405.h>
+#endif			/* __CONFIG_H */
diff --git a/include/configs/xilinx-ppc405.h b/include/configs/xilinx-ppc405.h
new file mode 100644
index 0000000..397d0d9
--- /dev/null
+++ b/include/configs/xilinx-ppc405.h
@@ -0,0 +1,123 @@
+/*
+ *
+ * (C) Copyright 2008
+ * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda at uam.es
+ * This work has been supported by: QTechnology  http://qtec.com/
+ *
+ * (C) Copyright 2008
+ * Georg Schardt <schardt at team-ctech.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* cpu parameter */
+#define CONFIG_4xx		1
+#define CONFIG_405		1
+#define CONFIG_XILINX_405	1
+
+/* memory map */
+#define CFG_SDRAM_BASE          0x0
+#define CFG_MONITOR_BASE        TEXT_BASE
+#define CFG_MONITOR_LEN         (192 * 1024)
+#define CFG_MALLOC_LEN          (CONFIG_ENV_SIZE + 128 * 1024)
+
+/* u-boot commands configuration */
+#include <config_cmd_default.h>
+
+/*Misc*/
+#define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds     */
+#define CFG_LONGHELP                    /* undef to save memory         */
+#define CFG_CBSIZE              256     /* Console I/O Buffer Size      */
+#define CFG_PBSIZE              (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
+#define CFG_MAXARGS             16      /* max number of command args   */
+#define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size */
+#define CFG_MEMTEST_START       0x00400000      /* memtest works on           */
+#define CFG_MEMTEST_END         0x00C00000      /* 4 ... 12 MB in DRAM        */
+#define CFG_LOAD_ADDR           0x01000000      /* default load address       */
+#define CFG_EXTBDINFO           1       /* Extended board_into (bd_t) */
+#define CFG_HZ                  1000    /* decrementer freq: 1 ms ticks */
+#define CONFIG_CMDLINE_EDITING          /* add command line history     */
+#define CONFIG_AUTO_COMPLETE            /* add autocompletion support   */
+#define CONFIG_LOOPW                    /* enable loopw command         */
+#define CONFIG_MX_CYCLIC                /* enable mdc/mwc commands      */
+#define CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
+#define CONFIG_VERSION_VARIABLE         /* include version env variable */
+#define CFG_CONSOLE_INFO_QUIET          /* don't print console @ startup */
+#define CFG_HUSH_PARSER                 /* Use the HUSH parser          */
+#define CFG_PROMPT_HUSH_PS2     "> "
+#define CONFIG_LOADS_ECHO               /* echo on for serial download  */
+#define CFG_LOADS_BAUD_CHANGE           /* allow baudrate change        */
+#define CFG_BOOTMAPSZ           (8 << 20)/* Initial Memory map for Linux */
+#define CFG_CACHELINE_SIZE      32
+#define CFG_CACHELINE_SHIFT	2
+
+/* stack */
+#define CFG_INIT_RAM_ADDR       0x800000  /* inside of SDRAM */
+#define CFG_INIT_RAM_END        0x2000    /* End of used area in RAM */
+#define CFG_GBL_DATA_SIZE       128
+#define CFG_GBL_DATA_OFFSET    (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
+
+#define CFG_FLASH_CFI           1
+#define CONFIG_FLASH_CFI_DRIVER 1
+#define CFG_FLASH_EMPTY_INFO    1
+#define CFG_MAX_FLASH_BANKS     1
+#define CFG_FLASH_PROTECTION
+
+/* serial communication */
+#ifdef XPAR_UARTLITE_0_BASEADDR
+#define CONFIG_XILINX_UARTLITE
+#define CONFIG_SERIAL_BASE      XPAR_UARTLITE_0_BASEADDR
+#define CONFIG_BAUDRATE         XPAR_UARTLITE_0_BAUDRATE
+#define CFG_BAUDRATE_TABLE      { CONFIG_BAUDRATE }
+#else
+#ifdef XPAR_UARTNS550_0_BASEADDR
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE    4
+#define CONFIG_CONS_INDEX       1
+#define CFG_NS16550_COM1        XPAR_UARTNS550_0_BASEADDR
+#define CFG_NS16550_CLK         XPAR_UARTNS550_0_CLOCK_FREQ_HZ
+#define CONFIG_BAUDRATE         115200
+#define CFG_BAUDRATE_TABLE      { 9600, 115200 }
+#endif
+#endif
+
+/* cmd config */
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_JFFS2
+#define CONFIG_JFFS2_CMDLINE
+#undef CONFIG_CMD_SPI
+#undef CONFIG_CMD_I2C
+#undef CONFIG_CMD_DTT
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_PING
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_IMLS
+
+#endif
-- 
1.5.6.5



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