[U-Boot] fsl_elbc_nand.c and nand_boot_fsl_elbc.c for large page devices

[Ron Madrid]

So is there a particular convention for which bytes should be used within the OOB area for an ECC?  I've looked for information on this but haven't been able to come up with anything.


--- On Thu, 10/16/08, Scott Wood <scottwood at freescale.com> wrote:

> From: Scott Wood <scottwood at freescale.com>
> Subject: Re: [U-Boot] fsl_elbc_nand.c and nand_boot_fsl_elbc.c for large page devices
> To: "Ron Madrid" <ron_madrid at sbcglobal.net>
> Cc: u-boot at lists.denx.de
> Date: Thursday, October 16, 2008, 12:17 PM
> On Tue, Oct 14, 2008 at 01:24:09PM -0700, Ron Madrid wrote:
> > 1.  I don't see anywhere that the AL (address
> length, or number of
> > address cycles) can be set to anything other than 2. 
> It appears to be
> > hard coded in both files.
> 
> Correct.  AFAICT, setting AL to anything less than 2 is
> just an
> optimization for small flashes.  Linux will make that
> optimization, but
> the way NAND devices are currently probed in u-boot makes
> that awkward
> (no opportunity to run code after size is known, but before
> nand_scan_tail).
> 
> > 2.  nand_boot_fsl_elbc.c uses ECCM = 1 for large page
> devices, but I
> > don't see a place where fsl_elbc_nand.c sets ECCM
> to 1 for similar
> > devices.
> 
> That looks like a bug.
> 
> -Scott