[U-Boot] Hangs at relocation on 460EX Target

[Felix Radensky]

Hi,

I had the same problem with u-boot-1.3.4 on custom 460EX board with
registered SODIMM. The SPD code in 4xx_spd_ddr2.c (program_copt1())
checks two  SPD fields to decide whether DIMM is registered: DDRII DIMM
type (offset 20) and SDRAM module attributes (offset 21).

In my case, the values in these fields do not match what code is looking 
for.
See http://www.micron.com/products/spddetail.aspx?part=MT9HTF6472RHY-667F1
I had to modify the following peice in program_copt1() to make it work:

            if (dimm_num == 0) {
                if (dimm_populated[dimm_num] == SDRAM_DDR1) /* DDR1 type */
                    mcopt1 |= SDRAM_MCOPT1_DDR1_TYPE;
                if (dimm_populated[dimm_num] == SDRAM_DDR2) /* DDR2 type */
                    mcopt1 |= SDRAM_MCOPT1_DDR2_TYPE;
                if (registered == 1) { /* DDR2 always buffered */
                    /* TODO: what about above  comments ? */
                    mcopt1 |= SDRAM_MCOPT1_RDEN;
                    buf0 = TRUE;
                } else {
                    /* TODO: the mask 0x02 doesn't match Samsung def for 
byte 21. */
                    if ((attribute & 0x02) == 0x00) {
                        /* buffered not supported */
                        buf0 = FALSE;
                    } else {
                        mcopt1 |= SDRAM_MCOPT1_RDEN;
                        buf0 = TRUE;
                    }
                }
            }

I've changed

if ((attribute & 0x02) == 0x00)

to be

if (((attribute & 0x02) == 0x00) && (attribute != 0x04))

I'm not sure this is generic enough to go into mainline, but if yes,
I can try to submit a patch.

Felix.

Stefan Roese wrote:
> On Thursday 23 October 2008, Ayman M. El-Khashab wrote:
>   
>> On Wed, Oct 22, 2008 at 07:12:30AM +0200, Stefan Roese wrote:
>>     
>>> Yes, there have been issues with the "old" autocalibration code on some
>>> boards. That's one reason that AMCC provided a new version just a few
>>> weeks ago:
>>>       
>> Thanks Stefan,  I've got the hardware mostly working now.
>>     
>
> Great, congrats.
>
>   
>> The new 
>> calibration code did work once I got past another issue.  I'll try to
>> describe it here b/c It *might* be a bug, but I wasn't 100% sure.
>>
>> First, I am using registered ecc dimms which appears to be handled in
>> cpu/ppc4xx/44x_spd_ddr2.c
>>     
>
> I personally have never used a registered DIMM on the 4xx systems. And I don't 
> know of any systems that do. So it could be that this is still untested and 
> buggy.
>
>   
>> However, what I found by observing the registers 
>> with the abatron was that the SDRAM_MCOPT1_RDEN was not set for the
>> registered DIMM. Following the code, it looks like it should have been set
>> if "registered" was set, but it does not appear that it worked correctly. 
>> So of course we were off by 1/2.  I forced the bit in the mcopt1 variable
>> and that fixed all the problems.
>>     
>
> Good.
>
>   
>> Any thoughts or is there something I can try/contribute?
>>     
>
> Best would be if you could provide a proper patch to fix this problem. Please 
> see here:
>
> http://www.denx.de/wiki/view/U-Boot/Patches
>
> how this is done correctly.
>
> Best regards,
> Stefan
>
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