[U-Boot] [PATCH][for 1.3.5] 85xx: Ensure timebase is zero on secondary cores

[Wolfgang Denk]

Dear Kumar Gala,

In message <31141755-2866-4C60-B179-F34E3E4646B4 at kernel.crashing.org> you wrote:
> 
> >> +	/* Ensure TB is 0 */
> >> +	li	r3,0
> >> +	mttbu	r3
> >> +	mttbl	r3
> >
> > If it's possible that TBL is a small negative number out of reset,  
> > then
> > we should write TBL before TBU to avoid a rollover race.
> 
> Time base is disabled at this point, so it should be moving AT ALL.

But swapping the two insns shouldn't hurt either.

Best regards,

Wolfgang Denk

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