[U-Boot] Malformed ARP packets

Remi Lefevre rlefevre at gmail.com
Fri Sep 19 11:37:15 CEST 2008


Thank you very much for your clues as I'm stuck on this for almost a week.

[snip]
> Is this DIMM memory sticks with using SPD configuration or are the SDRAM
> chips soldered to the board?

They are soldered.

> Did you verify the SDRAM databook timing vs. what you configured your SDRAM
> controller to do?  Did the hardware engineer that made the board verify your
> configuration?  Did he give you a good configuration?  If so, are you sure
> it is good??? (never trust the hardware weenies ;-)
>
> Did you read and understand <http://www.denx.de/wiki/view/DULG/SDRAM> ?

My SDRAM is a Micron MT48LC16M16A2. My init sequence is exactly the same as
the one in "freescale/mpc8266ads/mpc8266ads.c" or "sacsng/sacsng.c" that use
MT48LC8M16A2 , but I checked it anyway.

My PSDMR values have been given by another product using exactly the same
board and same HWCR configuration (PLD). But I will check them again.

I think I may configure incorrectly some other register that disturbs
the timing.
I thought about ECC as they are used, and tried a configuration with
it disabled,
same result. I also disabled all caches (HID0) for precaution.
>
> In real estate the three most important things are "location, location,
> location."  In engineering, they are "timing, timing, timing."

I'm learning it the hard way (perhaps the only way...).

> HTH,
> gvb

Thanks,
Rémi


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