[U-Boot] Uboot-1.2.0 on MPC8360EMDS board

[Remi Lefevre]

Hi Mike,

I'm very new to Powerpc so take my words with a lot of precautions.

I see two possibilities with your problem:

1. As U-Boot seems to reset after "Stack Pointer at: 0ffa9f28", you are
likely to encounter a relocation issue. As I have learnt it the hard
way (I cannot count the number of times my U-Boot hanged there), you may have
misconfigured the SDRAM module. Check other code using the same chips, memory
refresh timers and memory controller registers (SDRAM init sequence is
configured in the initdram() function of your board specific .c file).

http://www.denx.de/wiki/view/DULG/UBootCrashAfterRelocation
http://www.denx.de/wiki/view/DULG/SDRAM

2. If your board always reboots at the same moment, whatever the U-Boot
configuration is, you may have forgot to handle or deactivate your cpu
watchdog. On my mpc8270 board, I can disable them with the CFG_SYPCR
register; on yours, it seems to be with BCSR5[SWEN], but I'm really not
sure (and it seems to be off by default). Also check the CONFIG_WATCHDOG
option in U-Boot. Note that if you have slave cores on your board, you may
also need to handle them.

At last, perhaps try with a current version of U-Boot, you may get more help
with it.

I hope that this could help you. If not, just ignore, I just try to
give back the help I got there.

Good luck,
Rémi

On Tue, Sep 23, 2008 at 10:16 PM, Remi Lefevre <rlefevre at gmail.com> wrote:
> Hi Mike,
>
> I'm very new to Powerpc so take my words with a lot of precautions.
>
> I see two possibilities with your problem:
>
> 1. As U-Boot seems to reset after "Stack Pointer at: 0ffa9f28", you are
> likely to encounter a relocation issue. As I have learnt it the hard
> way (I cannot count the number of times my U-Boot hanged there), you may have
> misconfigured the SDRAM module. Check other code using the same chips, memory
> refresh timers and memory controller registers (SDRAM init sequence is
> configured in the initdram() function of your board specific .c file).
>
> http://www.denx.de/wiki/view/DULG/UBootCrashAfterRelocation
> http://www.denx.de/wiki/view/DULG/SDRAM
>
> 2. If your board always reboots at the same moment, whatever the U-Boot
> configuration is, you may have forgot to handle or deactivate your cpu
> watchdog. On my mpc8270 board, I can disable them with the CFG_SYPCR
> register; on yours, it seems to be with BCSR5[SWEN], but I'm really not
> sure (and it seems to be off by default). Also check the CONFIG_WATCHDOG
> option in U-Boot. Note that if you have slave cores on your board, you may
> also need to handle them.
>
> At last, perhaps try with a current version of U-Boot, you may get more help
> with it.
>
> I hope that this could help you. If not, just ignore, I just try to
> give back the help I got there.
>
> Good luck,
> Rémi
>
>
> On Tue, Sep 23, 2008 at 8:57 PM, mike zheng <mail4mz at gmail.com> wrote:
>> Hello,
>>
>> I am having problem when I try to bootup MPC8360EMDS with Uboot1.2.
>> The following are logs. The board reboot when the uboot tried to run
>> on the RAM. Any idea on this issue?
>>
>> Thanks,
>>
>> Mike
>>
>>
>> U-Boot 1.2.1 (Sep 23 2008 - 14:35:42) MPC83XX
>>
>> Clock configuration:
>>  Coherent System Bus:  264 MHz
>>  Core:                 528 MHz
>>  QE:                   396 MHz
>>  Local Bus Controller: 264 MHz
>>  Local Bus:             66 MHz
>>  DDR:                  264 MHz
>>  DDR Secondary:        264 MHz
>>  SEC:                   88 MHz
>>  I2C1:                 264 MHz
>>  I2C2:                 264 MHz
>> CPU: MPC8360E, Rev: 21 at 528 MHz
>> Board: Freescale MPC8360EMDS
>> I2C:   ready
>> DRAM:
>> cs0_bnds = 0x0000000f
>> cs0_config = 0x80000102
>> DDR:bar=0x00000000
>> DDR:ar=0x8000001b
>> DDR:Module maximum data rate is: 400Mhz
>> DDR:Effective data rate is: 266Mhz
>> DDR:The MSB 1 of CAS Latency is: 4
>> Errata DDR6 (debug_reg=0x002c0000)
>> DDR:timing_cfg_1=0x37353321
>> DDR:timing_cfg_2=0x00000800
>>
>>  DDR DIMM: data bus width is 64 bit with ECC
>> DDR:sdram_mode=0x00000032
>> DDR:sdram_interval=0x045b0100
>> DDR:sdram_clk_cntl=0x00000000
>>  DDRC ECC mode: OFF
>> DDR:sdram_cfg=0xc2000000
>>
>>  SDRAM on Local Bus: 64 MB
>>  DDR RAM: 256 MB
>> Top of RAM usable for U-Boot at: 10000000
>> Reserving 205k for U-Boot at: 0ffcc000
>> Reserving 136k for malloc() at: 0ffaa000
>> Reserving 76 Bytes for Board Info at: 0ffa9fb4
>> Reserving 104 Bytes for Global Data at: 0ffa9f4c
>> Stack Pointer at: 0ffa9f28
>> _______________________________________________
>> U-Boot mailing list
>> U-Boot at lists.denx.de
>> http://lists.denx.de/mailman/listinfo/u-boot
>>
>