[U-Boot] [PATCH] [ARM] Move machine specific code to board at s3c64xx (v2)

[Kyungmin Park]

Hi,

If there's no objection, could you apply this patch to ARM git tree?

Thank you,
Kyungmin Park

On Wed, Nov 26, 2008 at 10:18 AM, Kyungmin Park <kmpark at infradead.org> wrote:
> Move machine specific code to smdk6400.
> Some board use OneNAND instead of NAND.
>
> Some register MP0_CS_CFG[5:0] are controled by both h/w and s/w.
> So it's better to use macro instead of hard-coded value.
>
> Signed-off-by: Kyungmin Park <kyungmin.park at samsung.com>
> ---
> diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S
> index e0119a7..47f72f6 100644
> --- a/board/samsung/smdk6400/lowlevel_init.S
> +++ b/board/samsung/smdk6400/lowlevel_init.S
> @@ -104,6 +104,13 @@ lowlevel_init:
>        bl nand_asm_init
>  #endif
>
> +       /* Memory subsystem address 0x7e00f120 */
> +       ldr     r0, =ELFIN_MEM_SYS_CFG
> +
> +       /* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
> +       mov     r1, #S3C64XX_MEM_SYS_CFG_NAND
> +       str     r1, [r0]
> +
>        bl      mem_ctrl_asm_init
>
>  /* Wakeup support. Don't know if it's going to be used, untested. */
> diff --git a/cpu/arm1176/s3c64xx/cpu_init.S b/cpu/arm1176/s3c64xx/cpu_init.S
> index 08bda99..32bb467 100644
> --- a/cpu/arm1176/s3c64xx/cpu_init.S
> +++ b/cpu/arm1176/s3c64xx/cpu_init.S
> @@ -28,13 +28,6 @@
>
>        .globl mem_ctrl_asm_init
>  mem_ctrl_asm_init:
> -       /* Memory subsystem address 0x7e00f120 */
> -       ldr     r0, =ELFIN_MEM_SYS_CFG
> -
> -       /* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
> -       mov     r1, #0xd
> -       str     r1, [r0]
> -
>        /* DMC1 base address 0x7e001000 */
>        ldr     r0, =ELFIN_DMC1_BASE
>
> diff --git a/include/s3c6400.h b/include/s3c6400.h
> index fd3e99b..d3f136d 100644
> --- a/include/s3c6400.h
> +++ b/include/s3c6400.h
> @@ -380,6 +380,11 @@
>  */
>  #define ELFIN_MEM_SYS_CFG      0x7e00f120
>
> +#define S3C64XX_MEM_SYS_CFG_16BIT      (1 << 12)
> +
> +#define S3C64XX_MEM_SYS_CFG_NAND       0x0008
> +#define S3C64XX_MEM_SYS_CFG_ONENAND    S3C64XX_MEM_SYS_CFG_16BIT
> +
>  #define GPACON         (ELFIN_GPIO_BASE + GPACON_OFFSET)
>  #define GPADAT         (ELFIN_GPIO_BASE + GPADAT_OFFSET)
>  #define GPAPUD         (ELFIN_GPIO_BASE + GPAPUD_OFFSET)
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