[U-Boot] Ethernet receive issue in PPC440

[Stefan Roese]

On Wednesday 15 April 2009, prathika wrote:
> I am using PowerPC 440 EP.  The PHY I am using is DP83848. I have
> enabled RMII mode. I am making sure that all the registers are
> configured for this mode only, by reading back the registers.
>
> First i tried enabling internal loopback in PowerPC by enabling the ILE
> bit in EMAC0_MR1 register. There was no issue. Then I wanted to test
> external loopback without RJ-45 cable. that is the data transmitted by
> Power PC is loop backed by the PHY. So i disabled the ILE bit and
> enabled FullDuplex FDE bit in EMAC0_MR1 register (As illustrated in the
> PowerPC User Manual). I also enabled Internal Loopback in PHY.I had no
> issues in this also. I was able to receive the looped back packets from
> the PHY.
>
> Also to make sure that PHY has no issue, there is a built in test
> facility avaiilable in the PHY. I also enabled that bit and cleared for
> the passing of the Built In Test of the PHY.
>
> But i never tried doing loop back with the RJ-45 cable. But when i
> cleared the loop back along the PHY path, should i also test looping
> back with the cable??

Such an loopback test using an external shortcut RJ45 cable is more for a 
factory test of the interface. I just mentioned it to check which loopback 
test you were doing. You can better test with an PC connected to the 4xx 
EMAC. And this is what you are doing.

So you should concentrate on the receive path of the 4xx driver and analyze 
the errors that you are receiving.

Best regards,
Stefan

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