[U-Boot] [PATCH 1/9] MPC85xx: Add QE clk support for mpc85xx platforms
Haiying Wang
Haiying.Wang at freescale.com
Wed Apr 29 20:09:02 CEST 2009
Signed-off-by: Haiying Wang <Haiying.Wang at freescale.com>
---
cpu/mpc85xx/cpu.c | 4 ++++
cpu/mpc85xx/speed.c | 13 +++++++++++++
include/asm-ppc/immap_85xx.h | 2 ++
include/e500.h | 1 +
4 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index ef976a4..b812d88 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -184,6 +184,10 @@ int checkcpu (void)
printf("CPM: %s MHz\n", strmhz(buf1, sysinfo.freqSystemBus));
#endif
+#ifdef CONFIG_QE
+ printf(" QE:%-4s MHz\n", strmhz(buf1, sysinfo.freqQE));
+#endif
+
puts("L1: D-cache 32 kB enabled\n I-cache 32 kB enabled\n");
return 0;
diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c
index b0f47e0..16dbe76 100644
--- a/cpu/mpc85xx/speed.c
+++ b/cpu/mpc85xx/speed.c
@@ -40,6 +40,9 @@ void get_sys_info (sys_info_t * sysInfo)
uint plat_ratio,e500_ratio,half_freqSystemBus;
uint lcrr_div;
int i;
+#ifdef CONFIG_QE
+ u32 qe_ratio;
+#endif
plat_ratio = (gur->porpllsr) & 0x0000003e;
plat_ratio >>= 1;
@@ -65,6 +68,12 @@ void get_sys_info (sys_info_t * sysInfo)
}
#endif
+#ifdef CONFIG_QE
+ qe_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_QE_RATIO)
+ >> MPC85xx_PORPLLSR_QE_RATIO_SHIFT;
+ sysInfo->freqQE = qe_ratio * CONFIG_SYS_CLK_FREQ;
+#endif
+
#if defined(CONFIG_SYS_LBC_LCRR)
/* We will program LCRR to this value later */
lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV;
@@ -112,6 +121,10 @@ int get_clocks (void)
gd->mem_clk = sys_info.freqDDRBus;
gd->lbc_clk = sys_info.freqLocalBus;
+#ifdef CONFIG_QE
+ gd->qe_clk = sys_info.freqQE;
+ gd->brg_clk = gd->qe_clk / 2;
+#endif
/*
* The base clock for I2C depends on the actual SOC. Unfortunately,
* there is no pattern that can be used to determine the frequency, so
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 0810b8e..a4d25cd 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1581,6 +1581,8 @@ typedef struct ccsr_gur {
#define MPC85xx_PORPLLSR_DDR_RATIO 0x00003e00
#define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT 9
#endif
+#define MPC85xx_PORPLLSR_QE_RATIO 0x3e000000
+#define MPC85xx_PORPLLSR_QE_RATIO_SHIFT 25
uint porbmsr; /* 0xe0004 - POR boot mode status register */
#define MPC85xx_PORBMSR_HA 0x00070000
uint porimpscr; /* 0xe0008 - POR I/O impedance status and control register */
diff --git a/include/e500.h b/include/e500.h
index 4c5eeb7..84b580d 100644
--- a/include/e500.h
+++ b/include/e500.h
@@ -18,6 +18,7 @@ typedef struct
unsigned long freqSystemBus;
unsigned long freqDDRBus;
unsigned long freqLocalBus;
+ unsigned long freqQE;
} MPC85xx_SYS_INFO;
#endif /* _ASMLANGUAGE */
--
1.6.0.2
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