[U-Boot] [PATCH v2] 85xx: Added single core members of FSL P1xx/P2xx processors series

[Kumar Gala]

From: Poonam Aggrwal <poonam.aggrwal at freescale.com>

P1011 - Single core variant of P1020
P2010 - Single core variant of P2020

Signed-off-by: Poonam Aggrwal <poonam.aggrwal at freescale.com>
Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
---
* Updated to keep things sorted.  In MAKEALL we keep like boards together

 MAKEALL                     |    2 ++
 Makefile                    |   10 ++++++++++
 cpu/mpc85xx/Makefile        |    4 +++-
 cpu/mpc8xxx/cpu.c           |    8 ++++++--
 drivers/misc/fsl_law.c      |    3 ++-
 include/asm-ppc/processor.h |    8 ++++++--
 6 files changed, 29 insertions(+), 6 deletions(-)

diff --git a/MAKEALL b/MAKEALL
index db4a177..7f02c38 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -390,7 +390,9 @@ LIST_85xx="		\
 	MPC8572DS_36BIT	\
 	P2020DS		\
 	P2020DS_36BIT	\
+	P1011RDB	\
 	P1020RDB	\
+	P2010RDB	\
 	P2020RDB	\
 	PM854		\
 	PM856		\
diff --git a/Makefile b/Makefile
index b6b211f..19a2010 100644
--- a/Makefile
+++ b/Makefile
@@ -2494,11 +2494,21 @@ P2020DS_config:		unconfig
 	fi
 	@$(MKCONFIG) -a P2020DS ppc mpc85xx p2020ds freescale
 
+P1011RDB_config:	unconfig
+	@mkdir -p $(obj)include
+	@echo "#define CONFIG_P1011" >>$(obj)include/config.h ;
+	@$(MKCONFIG) -a P1_P2_RDB  ppc mpc85xx p1_p2_rdb freescale
+
 P1020RDB_config:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_P1020" >>$(obj)include/config.h ;
 	@$(MKCONFIG) -a P1_P2_RDB  ppc mpc85xx p1_p2_rdb freescale
 
+P2010RDB_config:	unconfig
+	@mkdir -p $(obj)include
+	@echo "#define CONFIG_P2010" >>$(obj)include/config.h ;
+	@$(MKCONFIG) -a P1_P2_RDB  ppc mpc85xx p1_p2_rdb freescale
+
 P2020RDB_config:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_P2020" >>$(obj)include/config.h ;
diff --git a/cpu/mpc85xx/Makefile b/cpu/mpc85xx/Makefile
index 1477eac..1bd8f30 100644
--- a/cpu/mpc85xx/Makefile
+++ b/cpu/mpc85xx/Makefile
@@ -49,8 +49,10 @@ COBJS-$(CONFIG_MPC8544) += ddr-gen2.o
 COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
 COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
 COBJS-$(CONFIG_MPC8569)	+= ddr-gen3.o
-COBJS-$(CONFIG_P2020)	+= ddr-gen3.o
+COBJS-$(CONFIG_P1011)	+= ddr-gen3.o
 COBJS-$(CONFIG_P1020)	+= ddr-gen3.o
+COBJS-$(CONFIG_P2010)	+= ddr-gen3.o
+COBJS-$(CONFIG_P2020)	+= ddr-gen3.o
 
 COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
 COBJS	= traps.o cpu.o cpu_init.o speed.o interrupts.o tlb.o \
diff --git a/cpu/mpc8xxx/cpu.c b/cpu/mpc8xxx/cpu.c
index fbab998..339f6d9 100644
--- a/cpu/mpc8xxx/cpu.c
+++ b/cpu/mpc8xxx/cpu.c
@@ -64,10 +64,14 @@ struct cpu_type cpu_type_list [] = {
 	CPU_TYPE_ENTRY(8569, 8569_E, 1),
 	CPU_TYPE_ENTRY(8572, 8572, 2),
 	CPU_TYPE_ENTRY(8572, 8572_E, 2),
-	CPU_TYPE_ENTRY(P2020, P2020, 2),
-	CPU_TYPE_ENTRY(P2020, P2020_E, 2),
+	CPU_TYPE_ENTRY(P1011, P1011, 1),
+	CPU_TYPE_ENTRY(P1011, P1011_E, 1),
 	CPU_TYPE_ENTRY(P1020, P1020, 2),
 	CPU_TYPE_ENTRY(P1020, P1020_E, 2),
+	CPU_TYPE_ENTRY(P2010, P2010, 1),
+	CPU_TYPE_ENTRY(P2010, P2010_E, 1),
+	CPU_TYPE_ENTRY(P2020, P2020, 2),
+	CPU_TYPE_ENTRY(P2020, P2020_E, 2),
 #elif defined(CONFIG_MPC86xx)
 	CPU_TYPE_ENTRY(8610, 8610, 1),
 	CPU_TYPE_ENTRY(8641, 8641, 2),
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index af7b729..147fe0a 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -39,7 +39,8 @@ DECLARE_GLOBAL_DATA_PTR;
       defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610)
 #define FSL_HW_NUM_LAWS 10
 #elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \
-      defined(CONFIG_P2020) || defined(CONFIG_P1020)
+      defined(CONFIG_P1011) || defined(CONFIG_P1020) || \
+      defined(CONFIG_P2010) || defined(CONFIG_P2020)
 #define FSL_HW_NUM_LAWS 12
 #else
 #error FSL_HW_NUM_LAWS not defined for this platform
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index a2b74bf..78ef418 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -1021,10 +1021,14 @@
 #define SVR_8569_E	0x808800
 #define SVR_8572	0x80E000
 #define SVR_8572_E	0x80E800
-#define SVR_P2020	0x80E200
-#define SVR_P2020_E	0x80EA00
+#define SVR_P1011	0x80E500
+#define SVR_P1011_E	0x80ED00
 #define SVR_P1020	0x80E400
 #define SVR_P1020_E	0x80EC00
+#define SVR_P2010	0x80E300
+#define SVR_P2010_E	0x80EB00
+#define SVR_P2020	0x80E200
+#define SVR_P2020_E	0x80EA00
 
 #define SVR_8610	0x80A000
 #define SVR_8641	0x809000
-- 
1.6.0.6