[U-Boot] 83xx and LCRR setting

Kim Phillips kim.phillips at freescale.com
Mon Aug 24 18:32:55 CEST 2009


On Sat, 22 Aug 2009 08:17:51 +0200
Heiko Schocher <hs at denx.de> wrote:

> Hello Kim,
> 
> Kim Phillips wrote:
> > On Thu, 20 Aug 2009 12:05:58 +0200
> > Heiko Schocher <hs at denx.de> wrote:
> > 
> >>>> On my board (and for example on the MPC832XEMDS) the flash is connected
> >>>> to the localbus ... and this register setting is done, while
> >>>> running from flash ... Hmm.. is this safe?
> >>> yeah, I'm not quite sure how that works myself!
> >> I stumbled over this, just because I didn;t set this
> >> LCRR_DBYP bit, which the CPU sets after a reset, so
> >> what Do you think about this patch?
> >>
> >> 832x, LCRR: change only the valid bits for this register
> >>
> >> Signed-off-by: Heiko Schocher <hs at denx.de>
> > 
> >> +#if defined(CONFIG_MPC832x)
> >> +#define LCRR_MASK			0xFFFCFFF0
> > 
> > if it's only the DBYP bit that is set out of reset, can we make this
> > 0x80000000?
> 
> Hmm.. but all the other bits are reserved=0. What happens if they
> are set to 1?

I guess I have a shoot-yourself-in-the-foot philosophy - you're free to
find out what happens when setting reserved bits to 1 if you so wish.
u-boot protects you up to the point where you veer off into using
hardcoded values instead of using the predefined CONFIG_SYS_SCCR_*
macros.

Kim


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