[U-Boot] [PATCH] tsec: Fix a bug in soft-resetting

[Andy Fleming]

SOFT_RESET must be asserted for at least 3 TX clocks.  Usually, that's about 30
clock cycles, so it's been mostly working.  But we had no guarantee, and at
slower bitrates, it's just over a microsecond (over 1000 clock cycles).  This
enforces a 2 microsecond gap between assertion and deassertion.

Signed-off-by: Andy Fleming <afleming at freescale.com>
---
 drivers/net/tsec.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index fbc9a6d..4682c8b 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -158,6 +158,7 @@ int tsec_initialize(bd_t * bis, struct tsec_info_struct *tsec_info)
 
 	/* Reset the MAC */
 	priv->regs->maccfg1 |= MACCFG1_SOFT_RESET;
+	udelay(2);  /* Soft Reset must be asserted for 3 TX clocks */
 	priv->regs->maccfg1 &= ~(MACCFG1_SOFT_RESET);
 
 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \
-- 
1.5.4.GIT