[U-Boot] [PATCH] tsec: Fix a bug in soft-resetting

Peter Tyser ptyser at xes-inc.com
Wed Feb 4 23:12:24 CET 2009


On Tue, 2009-02-03 at 18:26 -0600, Andy Fleming wrote:
> SOFT_RESET must be asserted for at least 3 TX clocks.  Usually, that's about 30
> clock cycles, so it's been mostly working.  But we had no guarantee, and at
> slower bitrates, it's just over a microsecond (over 1000 clock cycles).  This
> enforces a 2 microsecond gap between assertion and deassertion.
> 
> Signed-off-by: Andy Fleming <afleming at freescale.com>
> ---
>  drivers/net/tsec.c |    1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
> index fbc9a6d..4682c8b 100644
> --- a/drivers/net/tsec.c
> +++ b/drivers/net/tsec.c
> @@ -158,6 +158,7 @@ int tsec_initialize(bd_t * bis, struct tsec_info_struct *tsec_info)
>  
>  	/* Reset the MAC */
>  	priv->regs->maccfg1 |= MACCFG1_SOFT_RESET;
> +	udelay(2);  /* Soft Reset must be asserted for 3 TX clocks */
>  	priv->regs->maccfg1 &= ~(MACCFG1_SOFT_RESET);
>  
>  #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \

I tried  the patch out and it resolves a semi-common issue I was seeing
where the 1st received packet would have a CRC error that would result
in an error such as:
=> dhcp
Enet starting in 100BT/HD
Speed: 100, half duplex
BOOTP broadcast 1
Got error 4
BOOTP broadcast 2

Thanks!

Tested-by: Peter Tyser <ptyser at xes-inc.com>



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