[U-Boot] [PATCH] 4/12 Multiadapter/multibus I2C, drivers part 1
ksi at koi8.net
ksi at koi8.net
Thu Feb 12 23:17:29 CET 2009
Signed-off-by: Sergey Kubushyn <ksi at koi8.net>
---
diff -purN u-boot-i2c.orig/drivers/i2c/bfin-twi_i2c.c u-boot-i2c/drivers/i2c/bfin-twi_i2c.c
--- u-boot-i2c.orig/drivers/i2c/bfin-twi_i2c.c 2009-02-12 10:43:41.000000000 -0800
+++ u-boot-i2c/drivers/i2c/bfin-twi_i2c.c 2009-02-12 10:46:00.000000000 -0800
@@ -1,4 +1,8 @@
/*
+ * Copyright (c) 2009 Sergey Kubushyn <ksi at koi8.net>
+ *
+ * Changes for multibus/multiadapter I2C support.
+ *
* i2c.c - driver for Blackfin on-chip TWI/I2C
*
* Copyright (c) 2006-2008 Analog Devices Inc.
@@ -44,7 +48,7 @@
#ifdef CONFIG_TWICLK_KHZ
# error do not define CONFIG_TWICLK_KHZ ... use CONFIG_SYS_I2C_SPEED
#endif
-#if CONFIG_SYS_I2C_SPEED > 400000
+#if CONFIG_SYS_BFIN_TWI_I2C_SPEED > 400000
# error The Blackfin I2C hardware can only operate at 400KHz max
#endif
@@ -60,6 +64,10 @@ struct i2c_msg {
u8 *abuf; /* addr buffer */
};
+i2c_adap_t bfin_twi_i2c_adap;
+
+DECLARE_GLOBAL_DATA_PTR;
+
/**
* wait_for_completion - manage the actual i2c transfer
* @msg: the i2c msg
@@ -205,14 +213,14 @@ static int i2c_transfer(uchar chip, uint
}
/*
- * i2c_init - initialize the i2c bus
+ * bfin_twi_i2c_init - initialize the i2c bus
* @speed: bus speed (in HZ)
* @slaveaddr: address of device in slave mode (0 - not slave)
*
* Slave mode isn't actually implemented. It'll stay that way until
* we get a real request for it.
*/
-void i2c_init(int speed, int slaveaddr)
+static void bfin_twi_i2c_init(int speed, int slaveaddr)
{
uint8_t prescale = ((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F;
@@ -235,7 +243,7 @@ void i2c_init(int speed, int slaveaddr)
debugi("CONTROL:0x%04x CLKDIV:0x%04x",
bfin_read_TWI_CONTROL(), bfin_read_TWI_CLKDIV());
-#if CONFIG_SYS_I2C_SLAVE
+#if CONFIG_SYS_BFIN_TWI_I2C_SLAVE
# error I2C slave support not tested/supported
/* If they want us as a slave, do it */
if (slaveaddr) {
@@ -243,21 +251,13 @@ void i2c_init(int speed, int slaveaddr)
bfin_write_TWI_SLAVE_CTL(SEN);
}
#endif
+ if (gd->flags & GD_FLG_RELOC) {
+ bfin_twi_i2c_adap.init_done = 1;
+ }
}
/**
- * i2c_probe - test if a chip exists at a given i2c address
- * @chip: i2c chip addr to search for
- * @return: 0 if found, non-0 if not found
- */
-int i2c_probe(uchar chip)
-{
- u8 byte;
- return i2c_read(chip, 0, 0, &byte, 1);
-}
-
-/**
- * i2c_read - read data from an i2c device
+ * bfin_twi_i2c_read - read data from an i2c device
* @chip: i2c chip addr
* @addr: memory (register) address in the chip
* @alen: byte size of address
@@ -265,13 +265,24 @@ int i2c_probe(uchar chip)
* @len: how many bytes to read
* @return: 0 on success, non-0 on failure
*/
-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
+static int bfin_twi_i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
return i2c_transfer(chip, addr, alen, buffer, len, (alen ? I2C_M_COMBO : I2C_M_READ));
}
/**
- * i2c_write - write data to an i2c device
+ * bfin_twi_i2c_probe - test if a chip exists at a given i2c address
+ * @chip: i2c chip addr to search for
+ * @return: 0 if found, non-0 if not found
+ */
+static int bfin_twi_i2c_probe(uchar chip)
+{
+ u8 byte;
+ return bfin_twi_i2c_read(chip, 0, 0, &byte, 1);
+}
+
+/**
+ * bfin_twi_i2c_write - write data to an i2c device
* @chip: i2c chip addr
* @addr: memory (register) address in the chip
* @alen: byte size of address
@@ -279,7 +290,30 @@ int i2c_read(uchar chip, uint addr, int
* @len: how many bytes to write
* @return: 0 on success, non-0 on failure
*/
-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
+static int bfin_twi_i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
return i2c_transfer(chip, addr, alen, buffer, len, 0);
}
+
+static unsigned int bfin_twi_i2c_set_bus_speed(unsigned int speed)
+{
+ return(bfin_twi_i2c_adap.speed);
+}
+
+static unsigned int bfin_twi_i2c_get_bus_speed(void)
+{
+ return(bfin_twi_i2c_adap.speed);
+}
+
+i2c_adap_t bfin_twi_i2c_adap = {
+ .init = bfin_twi_i2c_init,
+ .probe = bfin_twi_i2c_probe,
+ .read = bfin_twi_i2c_read,
+ .write = bfin_twi_i2c_write,
+ .set_bus_speed = bfin_twi_i2c_set_bus_speed,
+ .get_bus_speed = bfin_twi_i2c_get_bus_speed,
+ .speed = CONFIG_SYS_BFIN_TWI_I2C_SPEED,
+ .slaveaddr = CONFIG_SYS_BFIN_TWI_I2C_SLAVE,
+ .init_done = 0,
+ .name = "bfin_twi_i2c"
+};
diff -purN u-boot-i2c.orig/drivers/i2c/fsl_i2c.c u-boot-i2c/drivers/i2c/fsl_i2c.c
--- u-boot-i2c.orig/drivers/i2c/fsl_i2c.c 2009-02-12 10:43:41.000000000 -0800
+++ u-boot-i2c/drivers/i2c/fsl_i2c.c 2009-02-12 10:46:00.000000000 -0800
@@ -1,4 +1,8 @@
/*
+ * Copyright (c) 2009 Sergey Kubushyn <ksi at koi8.net>
+ *
+ * Changes for multibus/multiadapter I2C support.
+ *
* Copyright 2006 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
@@ -18,8 +22,6 @@
#include <common.h>
-#ifdef CONFIG_HARD_I2C
-
#include <command.h>
#include <i2c.h> /* Functional interface */
@@ -31,24 +33,15 @@
#define I2C_READ_BIT 1
#define I2C_WRITE_BIT 0
-DECLARE_GLOBAL_DATA_PTR;
-
-/* Initialize the bus pointer to whatever one the SPD EEPROM is on.
- * Default is bus 0. This is necessary because the DDR initialization
- * runs from ROM, and we can't switch buses because we can't modify
- * the global variables.
- */
-#ifndef CONFIG_SYS_SPD_BUS_NUM
-#define CONFIG_SYS_SPD_BUS_NUM 0
-#endif
-static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = CONFIG_SYS_SPD_BUS_NUM;
+#define FSL_NAME(arg) "fsl_i2c@" MK_NAME(arg)
+#define MK_NAME(arg) #arg
-static unsigned int i2c_bus_speed[2] = {CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED};
+DECLARE_GLOBAL_DATA_PTR;
static const struct fsl_i2c *i2c_dev[2] = {
- (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET),
-#ifdef CONFIG_SYS_I2C2_OFFSET
- (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C2_OFFSET)
+ (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C_OFFSET),
+#ifdef CONFIG_SYS_FSL_I2C2_OFFSET
+ (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C2_OFFSET)
#endif
};
@@ -126,6 +119,8 @@ static const struct {
#endif
};
+i2c_adap_t fsl_i2c_adap[];
+
/**
* Set the I2C bus speed for a given I2C device
*
@@ -169,43 +164,32 @@ static unsigned int set_i2c_bus_speed(co
return speed;
}
-void
-i2c_init(int speed, int slaveadd)
+
+static void __i2c_init(int adap_no, int speed, int slaveadd)
{
struct fsl_i2c *dev;
unsigned int temp;
- dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET);
+ dev = i2c_dev[adap_no];
writeb(0, &dev->cr); /* stop I2C controller */
udelay(5); /* let it shutdown in peace */
temp = set_i2c_bus_speed(dev, gd->i2c1_clk, speed);
- if (gd->flags & GD_FLG_RELOC)
- i2c_bus_speed[0] = temp;
- writeb(slaveadd << 1, &dev->adr); /* write slave address */
- writeb(0x0, &dev->sr); /* clear status register */
- writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */
-
-#ifdef CONFIG_SYS_I2C2_OFFSET
- dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C2_OFFSET);
-
- writeb(0, &dev->cr); /* stop I2C controller */
- udelay(5); /* let it shutdown in peace */
- temp = set_i2c_bus_speed(dev, gd->i2c2_clk, speed);
- if (gd->flags & GD_FLG_RELOC)
- i2c_bus_speed[1] = temp;
+ if (gd->flags & GD_FLG_RELOC) {
+ fsl_i2c_adap[adap_no].speed = temp;
+ fsl_i2c_adap[adap_no].slaveaddr = slaveadd;
+ }
writeb(slaveadd << 1, &dev->adr); /* write slave address */
writeb(0x0, &dev->sr); /* clear status register */
writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */
-#endif
}
-static __inline__ int
-i2c_wait4bus(void)
+
+static __inline__ int i2c_wait4bus(int adap_no)
{
unsigned long long timeval = get_ticks();
- while (readb(&i2c_dev[i2c_bus_num]->sr) & I2C_SR_MBB) {
+ while (readb(&i2c_dev[adap_no]->sr) & I2C_SR_MBB) {
if ((get_ticks() - timeval) > usec2ticks(I2C_TIMEOUT))
return -1;
}
@@ -213,18 +197,18 @@ i2c_wait4bus(void)
return 0;
}
-static __inline__ int
-i2c_wait(int write)
+
+static __inline__ int i2c_wait(int adap_no, int write)
{
u32 csr;
unsigned long long timeval = get_ticks();
do {
- csr = readb(&i2c_dev[i2c_bus_num]->sr);
+ csr = readb(&i2c_dev[adap_no]->sr);
if (!(csr & I2C_SR_MIF))
continue;
- writeb(0x0, &i2c_dev[i2c_bus_num]->sr);
+ writeb(0x0, &i2c_dev[adap_no]->sr);
if (csr & I2C_SR_MAL) {
debug("i2c_wait: MAL\n");
@@ -248,85 +232,85 @@ i2c_wait(int write)
return -1;
}
-static __inline__ int
-i2c_write_addr (u8 dev, u8 dir, int rsta)
+
+static __inline__ int i2c_write_addr (int adap_no, u8 dev, u8 dir, int rsta)
{
writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX
| (rsta ? I2C_CR_RSTA : 0),
- &i2c_dev[i2c_bus_num]->cr);
+ &i2c_dev[adap_no]->cr);
- writeb((dev << 1) | dir, &i2c_dev[i2c_bus_num]->dr);
+ writeb((dev << 1) | dir, &i2c_dev[adap_no]->dr);
- if (i2c_wait(I2C_WRITE_BIT) < 0)
+ if (i2c_wait(adap_no, I2C_WRITE_BIT) < 0)
return 0;
return 1;
}
-static __inline__ int
-__i2c_write(u8 *data, int length)
+
+static __inline__ int i2c_write_data(int adap_no, u8 *data, int length)
{
int i;
writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX,
- &i2c_dev[i2c_bus_num]->cr);
+ &i2c_dev[adap_no]->cr);
for (i = 0; i < length; i++) {
- writeb(data[i], &i2c_dev[i2c_bus_num]->dr);
+ writeb(data[i], &i2c_dev[adap_no]->dr);
- if (i2c_wait(I2C_WRITE_BIT) < 0)
+ if (i2c_wait(adap_no, I2C_WRITE_BIT) < 0)
break;
}
return i;
}
-static __inline__ int
-__i2c_read(u8 *data, int length)
+
+static __inline__ int i2c_read_data(int adap_no, u8 *data, int length)
{
int i;
writeb(I2C_CR_MEN | I2C_CR_MSTA | ((length == 1) ? I2C_CR_TXAK : 0),
- &i2c_dev[i2c_bus_num]->cr);
+ &i2c_dev[adap_no]->cr);
/* dummy read */
- readb(&i2c_dev[i2c_bus_num]->dr);
+ readb(&i2c_dev[adap_no]->dr);
for (i = 0; i < length; i++) {
- if (i2c_wait(I2C_READ_BIT) < 0)
+ if (i2c_wait(adap_no, I2C_READ_BIT) < 0)
break;
/* Generate ack on last next to last byte */
if (i == length - 2)
writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_TXAK,
- &i2c_dev[i2c_bus_num]->cr);
+ &i2c_dev[adap_no]->cr);
/* Generate stop on last byte */
if (i == length - 1)
- writeb(I2C_CR_MEN | I2C_CR_TXAK, &i2c_dev[i2c_bus_num]->cr);
+ writeb(I2C_CR_MEN | I2C_CR_TXAK, &i2c_dev[adap_no]->cr);
- data[i] = readb(&i2c_dev[i2c_bus_num]->dr);
+ data[i] = readb(&i2c_dev[adap_no]->dr);
}
return i;
}
-int
-i2c_read(u8 dev, uint addr, int alen, u8 *data, int length)
+
+static int __i2c_read(int adap_no, u8 dev, uint addr, int alen, u8 *data, int length)
{
int i = -1; /* signal error */
u8 *a = (u8*)&addr;
- if (i2c_wait4bus() >= 0
- && i2c_write_addr(dev, I2C_WRITE_BIT, 0) != 0
- && __i2c_write(&a[4 - alen], alen) == alen)
+ if (i2c_wait4bus(adap_no) >= 0
+ && i2c_write_addr(adap_no, dev, I2C_WRITE_BIT, 0) != 0
+ && i2c_write_data(adap_no, &a[4 - alen], alen) == alen)
i = 0; /* No error so far */
if (length
- && i2c_write_addr(dev, I2C_READ_BIT, 1) != 0)
- i = __i2c_read(data, length);
+ && i2c_write_addr(adap_no, dev, I2C_READ_BIT, 1) != 0)
+ i = i2c_read_data(adap_no, data, length);
- writeb(I2C_CR_MEN, &i2c_dev[i2c_bus_num]->cr);
+ writeb(I2C_CR_MEN, &i2c_dev[adap_no]->cr);
if (i == length)
return 0;
@@ -334,19 +318,19 @@ i2c_read(u8 dev, uint addr, int alen, u8
return -1;
}
-int
-i2c_write(u8 dev, uint addr, int alen, u8 *data, int length)
+
+static int __i2c_write(int adap_no, u8 dev, uint addr, int alen, u8 *data, int length)
{
int i = -1; /* signal error */
u8 *a = (u8*)&addr;
- if (i2c_wait4bus() >= 0
- && i2c_write_addr(dev, I2C_WRITE_BIT, 0) != 0
- && __i2c_write(&a[4 - alen], alen) == alen) {
- i = __i2c_write(data, length);
+ if (i2c_wait4bus(adap_no) >= 0
+ && i2c_write_addr(adap_no, dev, I2C_WRITE_BIT, 0) != 0
+ && i2c_write_data(adap_no, &a[4 - alen], alen) == alen) {
+ i = i2c_write_data(adap_no, data, length);
}
- writeb(I2C_CR_MEN, &i2c_dev[i2c_bus_num]->cr);
+ writeb(I2C_CR_MEN, &i2c_dev[adap_no]->cr);
if (i == length)
return 0;
@@ -354,54 +338,123 @@ i2c_write(u8 dev, uint addr, int alen, u
return -1;
}
-int
-i2c_probe(uchar chip)
+
+static int __i2c_probe(int adap_no, uchar chip)
{
/* For unknow reason the controller will ACK when
* probing for a slave with the same address, so skip
* it.
*/
- if (chip == (readb(&i2c_dev[i2c_bus_num]->adr) >> 1))
+ if (chip == (readb(&i2c_dev[adap_no]->adr) >> 1))
return -1;
- return i2c_read(chip, 0, 0, NULL, 0);
+ return __i2c_read(adap_no, chip, 0, 0, NULL, 0);
}
-int i2c_set_bus_num(unsigned int bus)
+
+static int __i2c_set_bus_speed(int adap_no, unsigned int speed)
{
-#ifdef CONFIG_SYS_I2C2_OFFSET
- if (bus > 1) {
-#else
- if (bus > 0) {
-#endif
- return -1;
- }
+ unsigned int i2c_clk = (adap_no == 1) ? gd->i2c2_clk : gd->i2c1_clk;
- i2c_bus_num = bus;
+ writeb(0, &i2c_dev[adap_no]->cr); /* stop controller */
+ fsl_i2c_adap[adap_no].speed =
+ set_i2c_bus_speed(i2c_dev[adap_no], i2c_clk, speed);
+ writeb(I2C_CR_MEN, &i2c_dev[adap_no]->cr); /* start controller */
return 0;
}
-int i2c_set_bus_speed(unsigned int speed)
+
+/* Wrappers for the first controller */
+static void fsl_i2c1_init(int speed, int slaveadd)
+{
+ __i2c_init(0, speed, slaveadd);
+}
+
+static int fsl_i2c1_read(u8 dev, uint addr, int alen, u8 *data, int length)
{
- unsigned int i2c_clk = (i2c_bus_num == 1) ? gd->i2c2_clk : gd->i2c1_clk;
+ return(__i2c_read(0, dev, addr, alen, data, length));
+}
- writeb(0, &i2c_dev[i2c_bus_num]->cr); /* stop controller */
- i2c_bus_speed[i2c_bus_num] =
- set_i2c_bus_speed(i2c_dev[i2c_bus_num], i2c_clk, speed);
- writeb(I2C_CR_MEN, &i2c_dev[i2c_bus_num]->cr); /* start controller */
+static int fsl_i2c1_write(u8 dev, uint addr, int alen, u8 *data, int length)
+{
+ return(__i2c_write(0, dev, addr, alen, data, length));
+}
- return 0;
+static int fsl_i2c1_probe(uchar chip)
+{
+ return(__i2c_probe(0, chip));
+}
+
+static unsigned int fsl_i2c1_set_bus_speed(unsigned int speed)
+{
+ return(__i2c_set_bus_speed(0, speed));
}
-unsigned int i2c_get_bus_num(void)
+static unsigned int fsl_i2c1_get_bus_speed(void)
+{
+ return(fsl_i2c_adap[0].speed);
+}
+
+
+/* Second controller */
+#ifdef CONFIG_SYS_FSL_I2C2_OFFSET
+static void fsl_i2c2_init(int speed, int slaveadd)
{
- return i2c_bus_num;
+ __i2c_init(1, speed, slaveadd);
}
-unsigned int i2c_get_bus_speed(void)
+static int fsl_i2c2_read(u8 dev, uint addr, int alen, u8 *data, int length)
{
- return i2c_bus_speed[i2c_bus_num];
+ return(__i2c_read(1, dev, addr, alen, data, length));
}
-#endif /* CONFIG_HARD_I2C */
+static int fsl_i2c2_write(u8 dev, uint addr, int alen, u8 *data, int length)
+{
+ return(__i2c_write(1, dev, addr, alen, data, length));
+}
+
+static int fsl_i2c2_probe(uchar chip)
+{
+ return(__i2c_probe(1, chip));
+}
+
+static unsigned int fsl_i2c2_set_bus_speed(unsigned int speed)
+{
+ return(__i2c_set_bus_speed(1, speed));
+}
+
+static unsigned int fsl_i2c2_get_bus_speed(void)
+{
+ return(fsl_i2c_adap[1].speed);
+}
+#endif
+
+i2c_adap_t fsl_i2c_adap[] = {
+ {
+ .init = fsl_i2c1_init,
+ .probe = fsl_i2c1_probe,
+ .read = fsl_i2c1_read,
+ .write = fsl_i2c1_write,
+ .set_bus_speed = fsl_i2c1_set_bus_speed,
+ .get_bus_speed = fsl_i2c1_get_bus_speed,
+ .speed = CONFIG_SYS_FSL_I2C_SPEED,
+ .slaveaddr = CONFIG_SYS_FSL_I2C_SLAVE,
+ .init_done = 0,
+ .name = FSL_NAME(CONFIG_SYS_FSL_I2C_OFFSET)
+ },
+#ifdef CONFIG_SYS_FSL_I2C2_OFFSET
+ {
+ .init = fsl_i2c2_init,
+ .probe = fsl_i2c2_probe,
+ .read = fsl_i2c2_read,
+ .write = fsl_i2c2_write,
+ .set_bus_speed = fsl_i2c2_set_bus_speed,
+ .get_bus_speed = fsl_i2c2_get_bus_speed,
+ .speed = CONFIG_SYS_FSL_I2C2_SPEED,
+ .slaveaddr = CONFIG_SYS_FSL_I2C2_SLAVE,
+ .init_done = 0,
+ .name = FSL_NAME(CONFIG_SYS_FSL_I2C2_OFFSET)
+ },
+#endif
+};
diff -purN u-boot-i2c.orig/drivers/i2c/mxc_i2c.c u-boot-i2c/drivers/i2c/mxc_i2c.c
--- u-boot-i2c.orig/drivers/i2c/mxc_i2c.c 2009-02-12 10:43:41.000000000 -0800
+++ u-boot-i2c/drivers/i2c/mxc_i2c.c 2009-02-12 10:46:00.000000000 -0800
@@ -1,6 +1,10 @@
/*
* i2c driver for Freescale mx31
*
+ * Copyright (c) 2009 Sergey Kubushyn <ksi at koi8.net>
+ *
+ * Changes for multibus/multiadapter I2C support.
+ *
* (c) 2007 Pengutronix, Sascha Hauer <s.hauer at pengutronix.de>
*
* See file CREDITS for list of people who contributed to this
@@ -24,11 +28,11 @@
#include <common.h>
-#if defined(CONFIG_HARD_I2C)
-
#include <asm/arch/mx31.h>
#include <asm/arch/mx31-regs.h>
+#include <i2c.h>
+
#define IADR 0x00
#define IFDR 0x04
#define I2CR 0x08
@@ -47,15 +51,8 @@
#define I2SR_IIF (1 << 1)
#define I2SR_RX_NO_AK (1 << 0)
-#ifdef CONFIG_SYS_I2C_MX31_PORT1
-#define I2C_BASE 0x43f80000
-#elif defined (CONFIG_SYS_I2C_MX31_PORT2)
-#define I2C_BASE 0x43f98000
-#elif defined (CONFIG_SYS_I2C_MX31_PORT3)
-#define I2C_BASE 0x43f84000
-#else
-#error "define CONFIG_SYS_I2C_MX31_PORTx to use the mx31 I2C driver"
-#endif
+#define MXC_NAME(arg) "mxc_i2c@" MK_NAME(arg)
+#define MK_NAME(arg) #arg
#ifdef DEBUG
#define DPRINTF(args...) printf(args)
@@ -63,11 +60,15 @@
#define DPRINTF(args...)
#endif
+i2c_adap_t mxc_i2c_adap[];
+
static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80, 88, 104, 128, 144,
160, 192, 240, 288, 320, 384, 480, 576, 640, 768, 960,
1152, 1280, 1536, 1920, 2304, 2560, 3072, 3840};
-void i2c_init(int speed, int unused)
+DECLARE_GLOBAL_DATA_PTR;
+
+static void _i2c_init(int speed, int unused, ulong base)
{
int freq = mx31_get_ipg_clk();
int i;
@@ -78,125 +79,278 @@ void i2c_init(int speed, int unused)
DPRINTF("%s: speed: %d\n",__FUNCTION__, speed);
- __REG16(I2C_BASE + I2CR) = 0; /* Reset module */
- __REG16(I2C_BASE + IFDR) = i;
- __REG16(I2C_BASE + I2CR) = I2CR_IEN;
- __REG16(I2C_BASE + I2SR) = 0;
+ __REG16(base + I2CR) = 0; /* Reset module */
+ __REG16(base + IFDR) = i;
+ __REG16(base + I2CR) = I2CR_IEN;
+ __REG16(base + I2SR) = 0;
}
-static int wait_busy(void)
+static int wait_busy(ulong base)
{
int timeout = 10000;
- while (!(__REG16(I2C_BASE + I2SR) & I2SR_IIF) && --timeout)
+ while (!(__REG16(base + I2SR) & I2SR_IIF) && --timeout)
udelay(1);
- __REG16(I2C_BASE + I2SR) = 0; /* clear interrupt */
+ __REG16(base + I2SR) = 0; /* clear interrupt */
return timeout;
}
-static int tx_byte(u8 byte)
+static int tx_byte(u8 byte, ulong base)
{
- __REG16(I2C_BASE + I2DR) = byte;
+ __REG16(base + I2DR) = byte;
- if (!wait_busy() || __REG16(I2C_BASE + I2SR) & I2SR_RX_NO_AK)
+ if (!wait_busy(base) || __REG16(base + I2SR) & I2SR_RX_NO_AK)
return -1;
return 0;
}
-static int rx_byte(void)
+static int rx_byte(ulong base)
{
- if (!wait_busy())
+ if (!wait_busy(base))
return -1;
- return __REG16(I2C_BASE + I2DR);
+ return __REG16(base + I2DR);
}
-int i2c_probe(uchar chip)
+static int _i2c_probe(uchar chip, ulong base)
{
int ret;
- __REG16(I2C_BASE + I2CR) = 0; /* Reset module */
- __REG16(I2C_BASE + I2CR) = I2CR_IEN;
+ __REG16(base + I2CR) = 0; /* Reset module */
+ __REG16(base + I2CR) = I2CR_IEN;
- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX;
- ret = tx_byte(chip << 1);
- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MTX;
+ __REG16(base + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX;
+ ret = tx_byte(chip << 1, base);
+ __REG16(base + I2CR) = I2CR_IEN | I2CR_MTX;
return ret;
}
-static int i2c_addr(uchar chip, uint addr, int alen)
+static int i2c_addr(uchar chip, uint addr, int alen, ulong base)
{
- __REG16(I2C_BASE + I2SR) = 0; /* clear interrupt */
- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX;
+ __REG16(base + I2SR) = 0; /* clear interrupt */
+ __REG16(base + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX;
- if (tx_byte(chip << 1))
+ if (tx_byte(chip << 1, base))
return -1;
while (alen--)
- if (tx_byte((addr >> (alen * 8)) & 0xff))
+ if (tx_byte((addr >> (alen * 8)) & 0xff, base))
return -1;
return 0;
}
-int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+static int _i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len, ulong base)
{
int timeout = 10000;
int ret;
DPRINTF("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",__FUNCTION__, chip, addr, alen, len);
- if (i2c_addr(chip, addr, alen)) {
+ if (i2c_addr(chip, addr, alen, base)) {
printf("i2c_addr failed\n");
return -1;
}
- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX | I2CR_RSTA;
+ __REG16(base + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX | I2CR_RSTA;
- if (tx_byte(chip << 1 | 1))
+ if (tx_byte(chip << 1 | 1, base))
return -1;
- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | ((len == 1) ? I2CR_TX_NO_AK : 0);
+ __REG16(base + I2CR) = I2CR_IEN | I2CR_MSTA | ((len == 1) ? I2CR_TX_NO_AK : 0);
- ret = __REG16(I2C_BASE + I2DR);
+ ret = __REG16(base + I2DR);
while (len--) {
- if ((ret = rx_byte()) < 0)
+ if ((ret = rx_byte(base)) < 0)
return -1;
*buf++ = ret;
if (len <= 1)
- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_TX_NO_AK;
+ __REG16(base + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_TX_NO_AK;
}
- wait_busy();
+ wait_busy(base);
- __REG16(I2C_BASE + I2CR) = I2CR_IEN;
+ __REG16(base + I2CR) = I2CR_IEN;
- while (__REG16(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
+ while (__REG16(base + I2SR) & I2SR_IBB && --timeout)
udelay(1);
return 0;
}
-int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
+static int _i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len, ulong base)
{
int timeout = 10000;
DPRINTF("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",__FUNCTION__, chip, addr, alen, len);
- if (i2c_addr(chip, addr, alen))
+ if (i2c_addr(chip, addr, alen, base))
return -1;
while (len--)
- if (tx_byte(*buf++))
+ if (tx_byte(*buf++, base))
return -1;
- __REG16(I2C_BASE + I2CR) = I2CR_IEN;
+ __REG16(base + I2CR) = I2CR_IEN;
- while (__REG16(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
+ while (__REG16(base + I2SR) & I2SR_IBB && --timeout)
udelay(1);
return 0;
}
-#endif /* CONFIG_HARD_I2C */
+static void mxc_i2c_init(int speed, int slaveaddr)
+{
+ _i2c_init(speed, slaveaddr, CONFIG_SYS_MXC_I2C_BASE);
+
+ if (gd->flags & GD_FLG_RELOC) {
+ mxc_i2c_adap[0].init_done = 1;
+ mxc_i2c_adap[0].speed = speed;
+ mxc_i2c_adap[0].slaveaddr = slaveaddr;
+ }
+}
+
+static int mxc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+{
+ return(_i2c_read(chip, addr, alen, buf, len, CONFIG_SYS_MXC_I2C_BASE));
+}
+
+static int mxc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
+{
+ return(_i2c_write(chip, addr, alen, buf, len, CONFIG_SYS_MXC_I2C_BASE));
+}
+
+static int mxc_i2c_probe(uchar chip)
+{
+ return(_i2c_probe(chip, CONFIG_SYS_MXC_I2C_BASE));
+}
+
+static unsigned int mxc_i2c_set_bus_speed(unsigned int speed)
+{
+ return(mxc_i2c_adap[0].speed);
+}
+
+static unsigned int mxc_i2c_get_bus_speed(void)
+{
+ return(mxc_i2c_adap[0].speed);
+}
+
+#ifdef CONFIG_SYS_MXC_I2C2_BASE
+static void mxc_i2c2_init(int speed, int slaveaddr)
+{
+ _i2c_init(speed, slaveaddr, CONFIG_SYS_MXC_I2C2_BASE);
+
+ if (gd->flags & GD_FLG_RELOC) {
+ mxc_i2c_adap[1].init_done = 1;
+ mxc_i2c_adap[1].speed = speed;
+ mxc_i2c_adap[1].slaveaddr = slaveaddr;
+ }
+}
+
+static int mxc_i2c2_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+{
+ return(_i2c_read(chip, addr, alen, buf, len, CONFIG_SYS_MXC_I2C2_BASE));
+}
+
+static int mxc_i2c2_write(uchar chip, uint addr, int alen, uchar *buf, int len)
+{
+ return(_i2c_write(chip, addr, alen, buf, len, CONFIG_SYS_MXC_I2C2_BASE));
+}
+
+static int mxc_i2c2_probe(uchar chip)
+{
+ return(_i2c_probe(chip, CONFIG_SYS_MXC_I2C2_BASE));
+}
+
+static unsigned int mxc_i2c2_set_bus_speed(unsigned int speed)
+{
+ return(mxc_i2c_adap[1].speed);
+}
+
+static unsigned int mxc_i2c2_get_bus_speed(void)
+{
+ return(mxc_i2c_adap[1].speed);
+}
+#endif
+
+#ifdef CONFIG_SYS_MXC_I2C3_BASE
+static void mxc_i2c3_init(int speed, int slaveaddr)
+{
+ _i2c_init(speed, slaveaddr, CONFIG_SYS_MXC_I2C3_BASE);
+
+ if (gd->flags & GD_FLG_RELOC) {
+ mxc_i2c_adap[2].init_done = 1;
+ mxc_i2c_adap[2].speed = speed;
+ mxc_i2c_adap[2].slaveaddr = slaveaddr;
+ }
+}
+
+static int mxc_i2c3_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+{
+ return(_i2c_read(chip, addr, alen, buf, len, CONFIG_SYS_MXC_I2C3_BASE));
+}
+
+static int mxc_i2c3_write(uchar chip, uint addr, int alen, uchar *buf, int len)
+{
+ return(_i2c_write(chip, addr, alen, buf, len, CONFIG_SYS_MXC_I2C3_BASE));
+}
+
+static int mxc_i2c_probe(uchar chip)
+{
+ return(_i2c_probe(chip, CONFIG_SYS_MXC_I2C3_BASE));
+}
+
+static unsigned int mxc_i2c3_set_bus_speed(unsigned int speed)
+{
+ return(mxc_i2c_adap[2].speed);
+}
+
+static unsigned int mxc_i2c3_get_bus_speed(void)
+{
+ return(mxc_i2c_adap[2].speed);
+}
+#endif
+
+i2c_adap_t mxc_i2c_adap[] = {
+ {
+ .init = mxc_i2c_init,
+ .probe = mxc_i2c_probe,
+ .read = mxc_i2c_read,
+ .write = mxc_i2c_write,
+ .set_bus_speed = mxc_i2c_set_bus_speed,
+ .get_bus_speed = mxc_i2c_get_bus_speed,
+ .speed = CONFIG_SYS_MXC_I2C_SPEED,
+ .slaveaddr = CONFIG_SYS_MXC_I2C_SLAVE,
+ .init_done = 0,
+ .name = MXC_NAME(CONFIG_SYS_MXC_I2C_BASE)
+ },
+#ifdef CONFIG_SYS_MXC_I2C2_BASE
+ {
+ .init = mxc_i2c2_init,
+ .probe = mxc_i2c2_probe,
+ .read = mxc_i2c2_read,
+ .write = mxc_i2c2_write,
+ .set_bus_speed = mxc_i2c2_set_bus_speed,
+ .get_bus_speed = mxc_i2c2_get_bus_speed,
+ .speed = CONFIG_SYS_MXC_I2C2_SPEED,
+ .slaveaddr = CONFIG_SYS_MXC_I2C2_SLAVE,
+ .init_done = 0,
+ .name = MXC_NAME(CONFIG_SYS_MXC_I2C2_BASE)
+ },
+#endif
+#ifdef CONFIG_SYS_MXC_I2C3_BASE
+ {
+ .init = mxc_i2c3_init,
+ .probe = mxc_i2c3_probe,
+ .read = mxc_i2c3_read,
+ .write = mxc_i2c3_write,
+ .set_bus_speed = mxc_i2c3_set_bus_speed,
+ .get_bus_speed = mxc_i2c3_get_bus_speed,
+ .speed = CONFIG_SYS_MXC_I2C3_SPEED,
+ .slaveaddr = CONFIG_SYS_MXC_I2C3_SLAVE,
+ .init_done = 0,
+ .name = MXC_NAME(CONFIG_SYS_MXC_I2C3_BASE)
+ },
+#endif
+};
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